| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 243 ARMCC::CondCodes CCVal, SDValue CCR,
246 ARMCC::CondCodes CCVal, SDValue CCR,
249 ARMCC::CondCodes CCVal, SDValue CCR,
252 ARMCC::CondCodes CCVal, SDValue CCR,
2173 ARMCC::CondCodes CCVal, SDValue CCR, SDValue InFlag) {
2191 SDValue Ops[] = { FalseVal, CPTmp0, SOShImm, CC, CCR, InFlag };
2199 ARMCC::CondCodes CCVal, SDValue CCR, SDValue InFlag) {
2205 SDValue Ops[] = { FalseVal, CPTmp0, CPTmp2, CC, CCR, InFlag };
2211 SDValue Ops[] = { FalseVal, CPTmp0, CPTmp1, CPTmp2, CC, CCR, InFlag };
2219 ARMCC::CondCodes CCVal, SDValue CCR, SDValu
2172 SelectT2CMOVShiftOp(SDNode *N, SDValue FalseVal, SDValue TrueVal, ARMCC::CondCodes CCVal, SDValue CCR, SDValue InFlag) argument
2198 SelectARMCMOVShiftOp(SDNode *N, SDValue FalseVal, SDValue TrueVal, ARMCC::CondCodes CCVal, SDValue CCR, SDValue InFlag) argument
2218 SelectT2CMOVImmOp(SDNode *N, SDValue FalseVal, SDValue TrueVal, ARMCC::CondCodes CCVal, SDValue CCR, SDValue InFlag) argument
2249 SelectARMCMOVImmOp(SDNode *N, SDValue FalseVal, SDValue TrueVal, ARMCC::CondCodes CCVal, SDValue CCR, SDValue InFlag) argument
2286 SDValue CCR = N->getOperand(3); local
[all...] |
| H A D | ARMISelLowering.cpp | 2900 SDValue CCR = Cond.getOperand(3); local
2903 return DAG.getNode(ARMISD::CMOV, dl, VT, True, False, ARMcc, CCR, Cmp);
2929 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); local
2931 return DAG.getNode(ARMISD::CMOV, dl, VT, FalseVal, TrueVal, ARMcc, CCR,Cmp);
2939 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); local
2941 ARMcc, CCR, Cmp);
2947 Result, TrueVal, ARMcc2, CCR, Cmp2);
3051 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); local
3053 Chain, Dest, ARMcc, CCR, Cmp);
3083 SDValue CCR local
3103 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); local
3446 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); local
3480 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); local
[all...] |
| /macosx-10.9.5/cxxfilt-11/cxxfilt/opcodes/ |
| H A D | h8300-dis.c | 314 else if ((x & MODE) == CCR)
495 if (((looking_for & MODE) == CCR && (thisnib != C_CCR))
|
| /macosx-10.9.5/cxxfilt-11/cxxfilt/include/opcode/ |
| H A D | h8300.h | 80 CCR = 0x4000, enumerator in enum:h8_flags
1254 {O (O_ANDC, SB), AV_H8, 2, "andc", {{IMM8, CCR | DST, E}}, {{0x0, 0x6, IMM8LIST, E}}},
1424 {O (O_LDC, SB), AV_H8, 2, "ldc", {{IMM8, CCR | DST, E}}, {{ 0x0, 0x7, IMM8LIST, E}}},
1426 {O (O_LDC, SB), AV_H8, 2, "ldc", {{RS8, CCR | DST, E}}, {{0x0, 0x3, B30 | CCR | DST, RS8, E}}},
1428 {O (O_LDC, SW), AV_H8H, 2, "ldc", {{RSIND, CCR | DST, E}}, {{PREFIXLDC, 0x6, 0x9, B30 | RSIND, IGNORE, E}}},
1430 {O (O_LDC, SW), AV_H8H, 2, "ldc", {{RSPOSTINC, CCR | DST, E}}, {{PREFIXLDC, 0x6, 0xD, B30 | RSPOSTINC, IGNORE, E}}},
1432 {O (O_LDC, SW), AV_H8H, 2, "ldc", {{DISP16SRC, CCR | DST, E}}, {{PREFIXLDC, 0x6, 0xF, B30 | DISPREG, IGNORE, SRC | DISP16LIST, E}}},
1434 {O (O_LDC, SW), AV_H8H, 2, "ldc", {{DISP32SRC, CCR | DST, E}}, {{PREFIXLDC, 0x7, 0x8, B30 | DISPREG, 0x0, 0x6, 0xB, 0x2, IGNORE, SRC | DISP32LIST, E}}},
1436 {O (O_LDC, SW), AV_H8H, 2, "ldc", {{ABS16SRC, CCR | DS
[all...] |
| /macosx-10.9.5/cctools-845/as/ |
| H A D | m68k.c | 288 #define CCR (SR+1) /* 36 Condition code Reg */ macro
290 #define FPI (CCR+1) /* 37 floating-point instruction register */
603 /* This supports both CCR and CC as the ccr reg. */
606 ret = CCR;
609 ret = CCR;
1342 if(opP->mode!=MSCR || opP->reg!=CCR)
|
| /macosx-10.9.5/emacs-92/emacs/leim/quail/ |
| H A D | hangul3.el | 2849 ("o/f" ?$(CCR(B)
2850 ("ovf" ?$(CCR(B)
|
| H A D | hangul.el | 1940 ("chk" ?$(CCR(B)
|