Searched refs:instruction (Results 1 - 25 of 83) sorted by relevance

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/macosx-10.10.1/JavaScriptCore-7600.1.17/offlineasm/
H A Dinstructions.rb270 "pcrtoaddr", # Address from PC relative offset - adr instruction
332 def isBranch(instruction)
333 instruction =~ /^b/
336 def hasFallThrough(instruction)
337 instruction != "ret" and instruction != "jmp"
/macosx-10.10.1/JavaScriptCore-7600.1.17/bytecode/
H A DBytecodeUseDef.h39 Instruction* instruction = &instructionsBegin[bytecodeOffset]; local
40 OpcodeID opcodeID = interpreter->getOpcodeID(instruction->u.opcode);
78 functor(codeBlock, instruction, opcodeID, instruction[1].u.operand);
90 functor(codeBlock, instruction, opcodeID, instruction[1].u.operand);
91 functor(codeBlock, instruction, opcodeID, instruction[2].u.operand);
96 functor(codeBlock, instruction, opcodeID, instruction[
243 Instruction* instruction = &instructionsBegin[bytecodeOffset]; local
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H A DPutByIdStatus.cpp66 Instruction* instruction = profiledBlock->instructions().begin() + bytecodeIndex; local
68 Structure* structure = instruction[4].u.structure.get();
72 if (instruction[0].u.opcode == LLInt::getOpcode(op_put_by_id)
73 || instruction[0].u.opcode == LLInt::getOpcode(op_put_by_id_out_of_line)) {
83 ASSERT(instruction[0].u.opcode == LLInt::getOpcode(op_put_by_id_transition_direct)
84 || instruction[0].u.opcode == LLInt::getOpcode(op_put_by_id_transition_normal)
85 || instruction[0].u.opcode == LLInt::getOpcode(op_put_by_id_transition_direct_out_of_line)
86 || instruction[0].u.opcode == LLInt::getOpcode(op_put_by_id_transition_normal_out_of_line));
88 Structure* newStructure = instruction[6].u.structure.get();
89 StructureChain* chain = instruction[
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/macosx-10.10.1/cxxfilt-11/cxxfilt/opcodes/
H A Dtic4x-dis.c57 /* Determine the PC offset for a C[34]x instruction.
352 unsigned long instruction,
360 /* Print instruction name. */
367 if (! tic4x_print_cond (info, EXTRU (instruction, 20, 16)))
371 if (! tic4x_print_cond (info, EXTRU (instruction, 27, 23)))
395 EXTRU (instruction, 15, 0)))
400 tic4x_print_immed (info, IMMED_UINT, EXTRU (instruction, 15, 0));
404 tic4x_print_direct (info, EXTRU (instruction, 15, 0));
408 if (! tic4x_print_register (info, EXTRU (instruction, 24, 22) +
416 tic4x_print_relative (info, pc, EXTRS (instruction, 2
351 tic4x_print_op(struct disassemble_info *info, unsigned long instruction, tic4x_inst_t *p, unsigned long pc) argument
681 tic4x_disassemble(unsigned long pc, unsigned long instruction, struct disassemble_info *info) argument
727 (*info->fprintf_func) (info->stream, "%08lx", instruction); local
739 (*info->fprintf_func) (info->stream, "%08lx", instruction); local
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H A Darc-dis.h53 unsigned char* instruction; member in struct:arcDisState
H A Dcrx-dis.c48 /* Structure to hold valid 'cinv' instruction options. */
82 /* Number of valid 'cinv' instruction options. */
85 const inst *instruction; variable
86 /* Current instruction we're disassembling. */
88 /* The current instruction is read into 3 consecutive words. */
94 /* Nonzero means a CST4 instruction. */
96 /* Nonzero means the instruction's original size is
118 /* Retrieve the number of operands for the current assembled instruction. */
125 for (i = 0; instruction->operands[i].op_type && i < MAX_OPERANDS; i++)
154 This routine is used when disassembling the 'excp' instruction
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/macosx-10.10.1/cxxfilt-11/cxxfilt/include/opcode/
H A Dv850.h50 this instruction. Note a bit field is used as some instructions
77 /* If this value is -1 then the operand's bits are in a discontinous distribution in the instruction. */
80 /* (bits >= 0): How far the operand is left shifted in the instruction. */
85 operand value into an instruction, check this field.
89 (i is the instruction which we are filling in, o is a pointer to
94 instruction and the operand value. It will return the new value
95 of the instruction. If the ERRMSG argument is not NULL, then if
101 (unsigned long instruction, long op, const char ** errmsg);
104 extract this operand type from an instruction, check this field.
110 (i is the instruction,
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H A Dtic80.h73 /* How far the operand is left shifted in the instruction. */
78 operand value into an instruction, check this field.
82 (i is the instruction which we are filling in, o is a pointer to
87 instruction and the operand value. It will return the new value
88 of the instruction. If the ERRMSG argument is not NULL, then if
95 (unsigned long instruction, long op, const char **errmsg);
98 extract this operand type from an instruction, check this field.
105 (i is the instruction, o is a pointer to this structure, and op
109 instruction value. It will return the value of the operand. If
112 this operand (i.e., the instruction doe
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H A Dalpha.h72 /* A macro to extract the major opcode from an instruction. */
87 /* How far the operand is left shifted in the instruction. */
97 operand value into an instruction, check this field.
101 (i is the instruction which we are filling in, o is a pointer to
106 instruction and the operand value. It will return the new value
107 of the instruction. If the ERRMSG argument is not NULL, then if
112 unsigned (*insert) (unsigned instruction, int op, const char **errmsg);
115 extract this operand type from an instruction, check this field.
122 (i is the instruction, o is a pointer to this structure, and op
126 instruction valu
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H A Di370.h38 /* the length of the instruction */
144 /* How far the operand is left shifted in the instruction. */
148 operand value into an instruction, check this field.
152 (i is the instruction which we are filling in, o is a pointer to
157 instruction and the operand value. It will return the new value
158 of the instruction. If the ERRMSG argument is not NULL, then if
164 (i370_insn_t instruction, long op, const char **errmsg);
167 extract this operand type from an instruction, check this field.
174 (i is the instruction, o is a pointer to this structure, and op
178 instruction valu
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H A Dppc.h122 /* Opcode is an e500 SPE floating point instruction. */
149 /* A macro to extract the major opcode from an instruction. */
160 /* How far the operand is left shifted in the instruction. */
164 operand value into an instruction, check this field.
168 (i is the instruction which we are filling in, o is a pointer to
173 instruction and the operand value. It will return the new value
174 of the instruction. If the ERRMSG argument is not NULL, then if
180 (unsigned long instruction, long op, int dialect, const char **errmsg);
183 extract this operand type from an instruction, check this field.
190 (i is the instruction,
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H A Dcrx.h152 /* CRX instruction types. */
170 /* Maximum value supported for instruction types. */
172 /* Mask to record an instruction type. */
174 /* Return instruction type, given instruction's attributes. */
177 /* Indicates whether this instruction has a register list as parameter. */
189 /* Printing formats, where the instruction prefix isn't consecutive. */
197 /* Indicates whether this instruction can be relaxed. */
200 /* Indicates that instruction uses user registers (and not
204 /* Indicates that instruction ca
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/macosx-10.10.1/ruby-106/ruby/lib/rexml/
H A Dstreamlistener.rb24 # Called when an instruction is encountered. EG: <?xsl sheet='foo'?>
25 # @p name the instruction name; in the example, "xsl"
26 # @p instruction the rest of the instruction. In the example,
28 def instruction name, instruction method in class:REXML.StreamListener
/macosx-10.10.1/JavaScriptCore-7600.1.17/jit/
H A DJITCall.cpp50 void JIT::emitPutCallResult(Instruction* instruction) argument
52 int dst = instruction[1].u.operand;
57 void JIT::compileLoadVarargs(Instruction* instruction) argument
59 int thisValue = instruction[3].u.operand;
60 int arguments = instruction[4].u.operand;
61 int firstFreeRegister = instruction[5].u.operand;
62 int firstVarArgOffset = instruction[6].u.operand;
136 void JIT::compileCallEval(Instruction* instruction) argument
153 emitPutCallResult(instruction);
156 void JIT::compileCallEvalSlowCase(Instruction* instruction, Vecto argument
171 compileOpCall(OpcodeID opcodeID, Instruction* instruction, unsigned callLinkInfoIndex) argument
247 compileOpCallSlowCase(OpcodeID opcodeID, Instruction* instruction, Vector<SlowCaseEntry>::iterator& iter, unsigned callLinkInfoIndex) argument
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H A DJITCall32_64.cpp49 void JIT::emitPutCallResult(Instruction* instruction) argument
51 int dst = instruction[1].u.operand;
139 void JIT::compileLoadVarargs(Instruction* instruction) argument
141 int thisValue = instruction[3].u.operand;
142 int arguments = instruction[4].u.operand;
143 int firstFreeRegister = instruction[5].u.operand;
144 int firstVarArgOffset = instruction[6].u.operand;
220 void JIT::compileCallEval(Instruction* instruction) argument
238 emitPutCallResult(instruction);
241 void JIT::compileCallEvalSlowCase(Instruction* instruction, Vecto argument
259 compileOpCall(OpcodeID opcodeID, Instruction* instruction, unsigned callLinkInfoIndex) argument
338 compileOpCallSlowCase(OpcodeID opcodeID, Instruction* instruction, Vector<SlowCaseEntry>::iterator& iter, unsigned callLinkInfoIndex) argument
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/macosx-10.10.1/ruby-106/ruby/test/rexml/
H A Dlistener.rb19 def instruction name, instruction method in class:Listener
20 #puts "instruction"
/macosx-10.10.1/vim-55/runtime/autoload/xml/
H A Dxsl.vim6 \ 'attribute' : [['apply-imports', 'apply-templates', 'attribute', 'call-template', 'choose', 'comment', 'copy', 'copy-of', 'element', 'fallback', 'for-each', 'if', 'message', 'number', 'processing-instruction', 'text', 'value-of', 'variable'], {'name' : [], 'namespace' : []}],
14 \ 'element' : [['apply-imports', 'apply-templates', 'attribute', 'call-template', 'choose', 'comment', 'copy', 'copy-of', 'element', 'fallback', 'for-each', 'if', 'message', 'number', 'processing-instruction', 'text', 'value-of', 'variable'], {'name' : [], 'namespace' : [], 'use-attribute-sets' : []}],
17 \ 'if' : [['apply-imports', 'apply-templates', 'attribute', 'call-template', 'choose', 'comment', 'copy', 'copy-of', 'element', 'fallback', 'for-each', 'if', 'message', 'number', 'processing-instruction', 'text', 'value-of', 'variable'], {'test' : []}],
26 \ 'param' : [['apply-imports', 'apply-templates', 'attribute', 'call-template', 'choose', 'comment', 'copy', 'copy-of', 'element', 'fallback', 'for-each', 'if', 'message', 'number', 'processing-instruction', 'text', 'value-of', 'variable'], {'name' : [], 'select' : []}],
32 \ 'template' : [['apply-imports', 'apply-templates', 'attribute', 'call-template', 'choose', 'comment', 'copy', 'copy-of', 'element', 'fallback', 'for-each', 'if', 'message', 'number', 'processing-instruction', 'text', 'value-of', 'variable'], {'match' : [], 'name' : [], 'priority' : [], 'mode' : []}],
36 \ 'variable' : [['apply-imports', 'apply-templates', 'attribute', 'call-template', 'choose', 'comment', 'copy', 'copy-of', 'element', 'fallback', 'for-each', 'if', 'message', 'number', 'processing-instruction', 'text', 'value-of', 'variable'], {'name' : [], 'select' : []}],
38 \ 'with-param' : [['apply-imports', 'apply-templates', 'attribute', 'call-template', 'choose', 'comment', 'copy', 'copy-of', 'element', 'fallback', 'for-each', 'if', 'message', 'number', 'processing-instruction', 'text', 'value-of', 'variable'], {'name' : [], 'select' : []}]}
/macosx-10.10.1/JavaScriptCore-7600.1.17/assembler/
H A DARMAssembler.h181 // ARM instruction constants
286 padForAlign32 = 0xe12fff7f // 'bkpt 0xffff' instruction.
887 ARMWord* instruction = reinterpret_cast<ARMWord*>(from); local
888 ARMWord* address = getLdrImmAddress(instruction);
906 ARMWord* instruction = reinterpret_cast<ARMWord*>(where); local
907 ASSERT((*instruction & 0x0f700000) == LoadUint32);
909 *instruction = (*instruction & 0xff7ff000) | DataTransferUp | value;
911 *instruction = (*instruction
960 ARMWord* instruction = reinterpret_cast<ARMWord*>(instructionStart); local
986 ARMWord* instruction = reinterpret_cast<ARMWord*>(instructionStart); local
998 ARMWord* instruction = reinterpret_cast<ARMWord*>(instructionStart); local
1010 ARMWord* instruction = reinterpret_cast<ARMWord*>(instructionStart); local
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H A DARMv7Assembler.h1001 // Only allowed in IT (if then) block if last instruction.
1008 // Only allowed in IT (if then) block if last instruction.
1016 // Only allowed in IT (if then) block if last instruction.
1118 // rt == ARMRegisters::pc only allowed if last instruction in IT (if then) block.
1179 // rt == ARMRegisters::pc only allowed if last instruction in IT (if then) block.
1192 // rt == ARMRegisters::pc only allowed if last instruction in IT (if then) block.
1562 // rt == ARMRegisters::pc only allowed if last instruction in IT (if then) block.
1610 // rt == ARMRegisters::pc only allowed if last instruction in IT (if then) block.
1623 // rt == ARMRegisters::pc only allowed if last instruction in IT (if then) block.
1669 // rt == ARMRegisters::pc only allowed if last instruction i
2538 uint16_t* instruction = static_cast<uint16_t*>(address); local
2544 uint16_t* instruction = static_cast<uint16_t*>(address); local
2550 uint16_t* instruction = static_cast<uint16_t*>(address); local
2556 uint16_t* instruction = static_cast<uint16_t*>(address); local
2562 uint16_t* instruction = static_cast<uint16_t*>(address); local
2568 uint16_t* instruction = static_cast<uint16_t*>(address); local
2572 canBeJumpT1(const uint16_t* instruction, const void* target) argument
2585 canBeJumpT2(const uint16_t* instruction, const void* target) argument
2598 canBeJumpT3(const uint16_t* instruction, const void* target) argument
2607 canBeJumpT4(const uint16_t* instruction, const void* target) argument
2616 linkJumpT1(Condition cond, uint16_t* instruction, void* target) argument
2634 linkJumpT2(uint16_t* instruction, void* target) argument
2652 linkJumpT3(Condition cond, uint16_t* instruction, void* target) argument
2667 linkJumpT4(uint16_t* instruction, void* target) argument
2685 linkConditionalJumpT4(Condition cond, uint16_t* instruction, void* target) argument
2695 linkBX(uint16_t* instruction, void* target) argument
2711 linkConditionalBX(Condition cond, uint16_t* instruction, void* target) argument
2721 linkJumpAbsolute(uint16_t* instruction, void* target) argument
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/macosx-10.10.1/llvmCore-3425.0.34/bindings/ocaml/llvm/
H A Dllvm.mli148 (** The predicate for an integer comparison ([icmp]) instruction.
164 (** The predicate for a floating-point comparison ([fcmp]) instruction.
189 | Invalid (* not an instruction *)
671 (** [has_metadata i] returns whether or not the instruction [i] has any
677 kind [kind] in the instruction [i] See the function
682 instruction [i]. See the function [llvm::Instruction::setMetadata]. *)
686 instruction [i]. See the function [llvm::Instruction::setMetadata]. *)
1085 instruction.
1543 (** [instr_parent i] is the enclosing basic block of the instruction [i].
1547 (** [instr_begin bb] returns the first position in the instruction lis
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/macosx-10.10.1/sudo-73/src/
H A Dsiglist.in12 ILL Illegal instruction
16 IOT IOT instruction
/macosx-10.10.1/dyld-353.2.1/launch-cache/
H A DMachORebaser.hpp536 uint32_t instruction; local
560 instruction = A::P::E::get32(*p);
562 value = (instruction & 0x0000000F) + (codeToDataDelta >> 12);
563 instruction = (instruction & 0xFFFFFFF0) | (value & 0x0000000F);
564 A::P::E::set32(*p, instruction);
568 instruction = A::P::E::get32(*p);
570 value = ((instruction & 0x000F0000) >> 16) + (codeToDataDelta >> 12);
571 instruction = (instruction
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/macosx-10.10.1/JavaScriptCore-7600.1.17/interpreter/
H A DCallFrameInlines.h69 inline uint32_t CallFrame::Location::encodeAsBytecodeInstruction(Instruction* instruction) argument
71 uint32_t encodedBits = encode(BytecodeLocationTag, reinterpret_cast<uint32_t>(instruction));
/macosx-10.10.1/bash-94.1.2/bash-3.2/
H A Dmake_cmd.c563 if (temp->instruction != r_deblank_reading_until &&
564 temp->instruction != r_reading_until)
566 internal_error (_("make_here_document: bad instruction type %d"), temp->instruction);
570 kill_leading = temp->instruction == r_deblank_reading_until;
661 INSTRUCTION is the instruction type, SOURCE is a file descriptor,
664 make_redirection (source, instruction, dest_and_filename)
666 enum r_instruction instruction;
679 temp->instruction = instruction;
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/macosx-10.10.1/tcl-105/tcl_ext/tcllib/tcllib/modules/grammar_me/
H A Dme_cpucore.tcl101 set instruction {}
102 lappend instruction $jmp($base)
103 lappend instruction $iname($insn)
108 lappend instruction [lindex $pool $a]
113 lappend instruction [lindex $pool $a]
115 lappend instruction ${a}:$ord($a)
117 lappend instruction [lindex $pool $b]
122 lappend instruction [lindex $pool $a]
123 lappend instruction [lindex $pool $b]
126 lappend instruction
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