1# Copyright (C) 2011 Apple Inc. All rights reserved.
2#
3# Redistribution and use in source and binary forms, with or without
4# modification, are permitted provided that the following conditions
5# are met:
6# 1. Redistributions of source code must retain the above copyright
7#    notice, this list of conditions and the following disclaimer.
8# 2. Redistributions in binary form must reproduce the above copyright
9#    notice, this list of conditions and the following disclaimer in the
10#    documentation and/or other materials provided with the distribution.
11#
12# THIS SOFTWARE IS PROVIDED BY APPLE INC. AND ITS CONTRIBUTORS ``AS IS''
13# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
14# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
15# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL APPLE INC. OR ITS CONTRIBUTORS
16# BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
17# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
18# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
19# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
20# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
21# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
22# THE POSSIBILITY OF SUCH DAMAGE.
23
24require "config"
25require "set"
26
27# Interesting invariant, which we take advantage of: branching instructions
28# always begin with "b", and no non-branching instructions begin with "b".
29# Terminal instructions are "jmp" and "ret".
30
31MACRO_INSTRUCTIONS =
32    [
33     "addi",
34     "andi",
35     "lshifti",
36     "lshiftp",
37     "lshiftq",
38     "muli",
39     "negi",
40     "negp",
41     "negq",
42     "noti",
43     "ori",
44     "rshifti",
45     "urshifti",
46     "rshiftp",
47     "urshiftp",
48     "rshiftq",
49     "urshiftq",
50     "subi",
51     "xori",
52     "loadi",
53     "loadis",
54     "loadb",
55     "loadbs",
56     "loadh",
57     "loadhs",
58     "storei",
59     "storeb",
60     "loadd",
61     "moved",
62     "stored",
63     "addd",
64     "divd",
65     "subd",
66     "muld",
67     "sqrtd",
68     "ci2d",
69     "fii2d", # usage: fii2d <gpr with least significant bits>, <gpr with most significant bits>, <fpr>
70     "fd2ii", # usage: fd2ii <fpr>, <gpr with least significant bits>, <gpr with most significant bits>
71     "fq2d",
72     "fd2q",
73     "bdeq",
74     "bdneq",
75     "bdgt",
76     "bdgteq",
77     "bdlt",
78     "bdlteq",
79     "bdequn",
80     "bdnequn",
81     "bdgtun",
82     "bdgtequn",
83     "bdltun",
84     "bdltequn",
85     "btd2i",
86     "td2i",
87     "bcd2i",
88     "movdz",
89     "pop",
90     "push",
91     "move",
92     "sxi2q",
93     "zxi2q",
94     "nop",
95     "bieq",
96     "bineq",
97     "bia",
98     "biaeq",
99     "bib",
100     "bibeq",
101     "bigt",
102     "bigteq",
103     "bilt",
104     "bilteq",
105     "bbeq",
106     "bbneq",
107     "bba",
108     "bbaeq",
109     "bbb",
110     "bbbeq",
111     "bbgt",
112     "bbgteq",
113     "bblt",
114     "bblteq",
115     "btis",
116     "btiz",
117     "btinz",
118     "btbs",
119     "btbz",
120     "btbnz",
121     "jmp",
122     "baddio",
123     "baddis",
124     "baddiz",
125     "baddinz",
126     "bsubio",
127     "bsubis",
128     "bsubiz",
129     "bsubinz",
130     "bmulio",
131     "bmulis",
132     "bmuliz",
133     "bmulinz",
134     "borio",
135     "boris",
136     "boriz",
137     "borinz",
138     "break",
139     "call",
140     "ret",
141     "cbeq",
142     "cbneq",
143     "cba",
144     "cbaeq",
145     "cbb",
146     "cbbeq",
147     "cbgt",
148     "cbgteq",
149     "cblt",
150     "cblteq",
151     "cieq",
152     "cineq",
153     "cia",
154     "ciaeq",
155     "cib",
156     "cibeq",
157     "cigt",
158     "cigteq",
159     "cilt",
160     "cilteq",
161     "tis",
162     "tiz",
163     "tinz",
164     "tbs",
165     "tbz",
166     "tbnz",
167     "tps",
168     "tpz",
169     "tpnz",
170     "peek",
171     "poke",
172     "bpeq",
173     "bpneq",
174     "bpa",
175     "bpaeq",
176     "bpb",
177     "bpbeq",
178     "bpgt",
179     "bpgteq",
180     "bplt",
181     "bplteq",
182     "addp",
183     "mulp",
184     "andp",
185     "orp",
186     "subp",
187     "xorp",
188     "loadp",
189     "cpeq",
190     "cpneq",
191     "cpa",
192     "cpaeq",
193     "cpb",
194     "cpbeq",
195     "cpgt",
196     "cpgteq",
197     "cplt",
198     "cplteq",
199     "storep",
200     "btps",
201     "btpz",
202     "btpnz",
203     "baddpo",
204     "baddps",
205     "baddpz",
206     "baddpnz",
207     "tqs",
208     "tqz",
209     "tqnz",
210     "bqeq",
211     "bqneq",
212     "bqa",
213     "bqaeq",
214     "bqb",
215     "bqbeq",
216     "bqgt",
217     "bqgteq",
218     "bqlt",
219     "bqlteq",
220     "addq",
221     "mulq",
222     "andq",
223     "orq",
224     "subq",
225     "xorq",
226     "loadq",
227     "cqeq",
228     "cqneq",
229     "cqa",
230     "cqaeq",
231     "cqb",
232     "cqbeq",
233     "cqgt",
234     "cqgteq",
235     "cqlt",
236     "cqlteq",
237     "storeq",
238     "btqs",
239     "btqz",
240     "btqnz",
241     "baddqo",
242     "baddqs",
243     "baddqz",
244     "baddqnz",
245     "bo",
246     "bs",
247     "bz",
248     "bnz",
249     "leai",
250     "leap",
251     "pushCalleeSaves",
252     "popCalleeSaves",
253     "memfence"
254    ]
255
256X86_INSTRUCTIONS =
257    [
258     "cdqi",
259     "idivi"
260    ]
261
262ARM_INSTRUCTIONS =
263    [
264     "clrbp",
265     "mvlbl"
266    ]
267
268ARM64_INSTRUCTIONS =
269    [
270     "pcrtoaddr",    # Address from PC relative offset - adr instruction
271     "popLRAndFP",   # ARM64 requires registers to be pushed and popped in pairs,
272     "pushLRAndFP"   # therefore we do LR (link register) and FP (frame pointer) together.
273    ]
274
275RISC_INSTRUCTIONS =
276    [
277     "smulli",  # Multiply two 32-bit words and produce a 64-bit word
278     "addis",   # Add integers and set a flag.
279     "subis",   # Same, but for subtraction.
280     "oris",    # Same, but for bitwise or.
281     "addps"    # addis but for pointers.
282    ]
283
284MIPS_INSTRUCTIONS =
285    [
286    "movz",
287    "movn",
288    "slt",
289    "sltu",
290    "pichdr",
291    "pichdrra"
292    ]
293
294SH4_INSTRUCTIONS =
295    [
296    "flushcp",
297    "alignformova",
298    "mova",
299    "shllx",
300    "shlrx",
301    "shld",
302    "shad",
303    "bdnan",
304    "loaddReversedAndIncrementAddress",
305    "storedReversedAndDecrementAddress",
306    "ldspr",
307    "stspr",
308    "setargs"
309    ]
310
311CXX_INSTRUCTIONS =
312    [
313     "cloopCrash",              # no operands
314     "cloopCallJSFunction",     # operands: callee
315     "cloopCallNative",         # operands: callee
316     "cloopCallSlowPath",       # operands: callTarget, currentFrame, currentPC
317     "cloopCallSlowPathVoid",   # operands: callTarget, currentFrame, currentPC
318
319     # For debugging only:
320     # Takes no operands but simply emits whatever follows in // comments as
321     # a line of C++ code in the generated LLIntAssembly.h file. This can be
322     # used to insert instrumentation into the interpreter loop to inspect
323     # variables of interest. Do not leave these instructions in production
324     # code.
325     "cloopDo",              # no operands
326    ]
327
328INSTRUCTIONS = MACRO_INSTRUCTIONS + X86_INSTRUCTIONS + ARM_INSTRUCTIONS + ARM64_INSTRUCTIONS + RISC_INSTRUCTIONS + MIPS_INSTRUCTIONS + SH4_INSTRUCTIONS + CXX_INSTRUCTIONS
329
330INSTRUCTION_SET = INSTRUCTIONS.to_set
331
332def isBranch(instruction)
333    instruction =~ /^b/
334end
335
336def hasFallThrough(instruction)
337    instruction != "ret" and instruction != "jmp"
338end
339
340