Lines Matching refs:instruction
57 /* Determine the PC offset for a C[34]x instruction.
352 unsigned long instruction,
360 /* Print instruction name. */
367 if (! tic4x_print_cond (info, EXTRU (instruction, 20, 16)))
371 if (! tic4x_print_cond (info, EXTRU (instruction, 27, 23)))
395 EXTRU (instruction, 15, 0)))
400 tic4x_print_immed (info, IMMED_UINT, EXTRU (instruction, 15, 0));
404 tic4x_print_direct (info, EXTRU (instruction, 15, 0));
408 if (! tic4x_print_register (info, EXTRU (instruction, 24, 22) +
416 tic4x_print_relative (info, pc, EXTRS (instruction, 23, 0),
419 tic4x_print_addr (info, EXTRU (instruction, 23, 0));
426 EXTRU (instruction, 7, 0)))
436 if (! tic4x_print_register (info, EXTRU (instruction, 7, 0)))
442 EXTRU (instruction, 15, 0));
446 if (EXTRU (instruction, 7, 5) == 7)
448 if (!tic4x_print_register (info, EXTRU (instruction, 4, 0)))
456 EXTRU (instruction, 7, 0)))
461 if (EXTRU (instruction, 15, 13) == 7)
463 if (! tic4x_print_register (info, EXTRU (instruction, 12, 8)))
470 EXTRU (instruction, 15, 8)))
476 if (! tic4x_print_register (info, EXTRU (instruction, 15, 8)))
481 if (! tic4x_print_register (info, EXTRU (instruction, 18, 16)))
486 if (! tic4x_print_register (info, EXTRU (instruction, 21, 19)))
491 if (! tic4x_print_register (info, EXTRU (instruction, 24, 22)))
496 tic4x_print_register (info, EXTRU (instruction, 22, 22) + REG_R2);
500 tic4x_print_register (info, EXTRU (instruction, 23, 23) + REG_R0);
507 EXTRU (instruction, 15, 8)))
512 tic4x_print_relative (info, pc, EXTRS (instruction, 15, 0),
518 if (! tic4x_print_register (info, EXTRU (instruction, 15, 0)))
524 if (! tic4x_print_register (info, EXTRU (instruction, 20, 16)))
530 EXTRS (instruction, 15, 0));
537 EXTRU (instruction, 20, 16)))
542 tic4x_print_immed (info, IMMED_SUINT, EXTRU (instruction, 15, 0));
548 EXTRU (instruction, 8, 0) :
549 EXTRU (instruction, 4, 0) & ~0x20);
555 tic4x_print_immed (info, IMMED_SINT, EXTRS (instruction, 7, 0));
559 val = EXTRU (instruction, 4, 0) + REG_IVTP;
567 val = EXTRU (instruction, 20, 16);
575 val = EXTRU (instruction, 20, 16) + REG_IVTP;
582 case '|': /* Parallel instruction. */
663 /* Add the instruction already on the list. */
666 /* Add the new instruction. */
674 /* Disassemble the instruction in 'instruction'.
675 'pc' should be the address of this instruction, it will
677 the disassembled instruction is written to 'info'.
678 The function returns the length of this instruction in words. */
682 unsigned long instruction,
717 if ((instruction >> 16) == 0x5070 || (instruction >> 16) == 0x1f70)
718 tic4x_dp = EXTRU (instruction, 15, 0);
720 p = optable[instruction >> (32 - TIC4X_HASH_SIZE)];
723 if (((instruction & p->opmask) == p->opcode)
724 && tic4x_print_op (NULL, instruction, p, pc))
725 tic4x_print_op (info, instruction, p, pc);
727 (*info->fprintf_func) (info->stream, "%08lx", instruction);
733 && optable_special[i]->opcode == instruction)
739 (*info->fprintf_func) (info->stream, "%08lx", instruction);