| /macosx-10.10.1/llvmCore-3425.0.34/lib/MC/ |
| H A D | MCRegisterInfo.cpp | 21 if (RC->contains(*Supers) && Reg == getSubReg(*Supers, SubIdx))
26 unsigned MCRegisterInfo::getSubReg(unsigned Reg, unsigned Idx) const { function in class:MCRegisterInfo
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| /macosx-10.10.1/llvmCore-3425.0.34/lib/Target/ |
| H A D | TargetRegisterInfo.cpp | 181 if (RCI.getSubReg() == Idx)
220 unsigned FinalA = composeSubRegIndices(IA.getSubReg(), SubA);
229 unsigned FinalB = composeSubRegIndices(IB.getSubReg(), SubB);
239 *BestPreA = IA.getSubReg();
240 *BestPreB = IB.getSubReg();
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| /macosx-10.10.1/llvmCore-3425.0.34/lib/CodeGen/ |
| H A D | CalcSpillWeights.cpp | 64 sub = mi->getOperand(0).getSubReg();
66 hsub = mi->getOperand(1).getSubReg();
68 sub = mi->getOperand(1).getSubReg();
70 hsub = mi->getOperand(0).getSubReg();
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| H A D | OptimizePHIs.cpp | 106 !SrcMI->getOperand(0).getSubReg() &&
107 !SrcMI->getOperand(1).getSubReg() &&
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| H A D | TargetInstrInfoImpl.cpp | 81 unsigned SubReg0 = HasDef ? MI->getOperand(0).getSubReg() : 0;
82 unsigned SubReg1 = MI->getOperand(Idx1).getSubReg();
83 unsigned SubReg2 = MI->getOperand(Idx2).getSubReg();
259 if (FoldOp.getSubReg() || LiveOp.getSubReg())
394 MI->getOperand(0).getSubReg() && MI->readsVirtualRegister(DefReg))
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| H A D | VirtRegMap.cpp | 286 if (MO.getSubReg()) {
308 PhysReg = TRI->getSubReg(PhysReg, MO.getSubReg());
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| H A D | ExpandPostRAPseudos.cpp | 104 assert(!MI->getOperand(2).getSubReg() && "SubIdx on physreg?");
108 unsigned DstSubReg = TRI->getSubReg(DstReg, SubIdx);
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| H A D | MachineInstr.cpp | 73 if (SubIdx && getSubReg())
74 SubIdx = TRI.composeSubRegIndices(SubIdx, getSubReg());
82 if (getSubReg()) {
83 Reg = TRI.getSubReg(Reg, getSubReg());
84 // Note that getSubReg() may return 0 if the sub-register doesn't exist.
179 getSubReg() == Other.getSubReg();
218 return hash_combine(MO.getType(), MO.getReg(), MO.getSubReg(), MO.isDef());
268 OS << PrintReg(getReg(), TRI, getSubReg());
[all...] |
| H A D | RegAllocFast.cpp | 659 if (!MO.getSubReg()) {
665 MO.setReg(PhysReg ? TRI->getSubReg(PhysReg, MO.getSubReg()) : 0);
696 (MO.getSubReg() && MI->readsVirtualRegister(Reg))) {
734 } else if (MO.getSubReg() && MI->readsVirtualRegister(Reg)) {
940 CopyDstSub = MI->getOperand(0).getSubReg();
941 CopySrcSub = MI->getOperand(1).getSubReg();
968 if (MO.getSubReg() && MI->readsVirtualRegister(Reg))
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| H A D | TwoAddressInstructionPass.cpp | 1453 assert(mi->getOperand(0).getSubReg() == 0 && "Unexpected subreg idx");
1554 SrcSubIndices.push_back(UseMI->getOperand(1).getSubReg());
1555 DstSubIndices.push_back(UseMI->getOperand(0).getSubReg());
1590 unsigned DstSubIdx = UseMI->getOperand(0).getSubReg();
1591 unsigned SrcSubIdx = UseMI->getOperand(1).getSubReg();
1664 if (MI->getOperand(0).getSubReg() ||
1681 unsigned SrcSubIdx = MI->getOperand(i).getSubReg();
1687 if (!MI->getOperand(i).getSubReg() &&
1699 if (DefMI && DefMI->isCopy() && DefMI->getOperand(1).getSubReg())
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| H A D | PHIElimination.cpp | 210 assert(MPhi->getOperand(0).getSubReg() == 0 && "Can't handle sub-reg PHIs");
296 unsigned SrcSubReg = MPhi->getOperand(i*2+1).getSubReg();
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| H A D | PeepholeOptimizer.cpp | 200 if (UseSrcSubIdx && UseMO.getSubReg() != SubIdx)
423 if (!MI->getOperand(0).getSubReg() &&
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| H A D | LiveDebugVariables.cpp | 185 locations[i].getSubReg() == LocMO.getSubReg())
563 if (UI.getOperand().getSubReg() || !UI->isCopy())
794 MO.setSubReg(locations[OldLocNo].getSubReg());
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| H A D | RegisterCoalescer.cpp | 217 DstSub = MI->getOperand(0).getSubReg();
219 SrcSub = MI->getOperand(1).getSubReg();
222 DstSub = compose(tri, MI->getOperand(0).getSubReg(),
225 SrcSub = MI->getOperand(2).getSubReg();
256 Dst = TRI.getSubReg(Dst, DstSub);
351 Dst = TRI.getSubReg(Dst, DstSub);
356 return TRI.getSubReg(DstReg, SrcSub) == Dst;
678 UseMI->getOperand(0).getSubReg())
1332 L |= TRI->getSubRegIndexLaneMask(compose(*TRI, SubIdx, MO->getSubReg()));
1665 TRI->getSubRegIndexLaneMask(compose(*TRI, SubIdx, MO->getSubReg())))
[all...] |
| /macosx-10.10.1/llvmCore-3425.0.34/lib/Target/ARM/ |
| H A D | ARMExpandPseudoInsts.cpp | 354 D0 = TRI->getSubReg(Reg, ARM::dsub_0);
355 D1 = TRI->getSubReg(Reg, ARM::dsub_1);
356 D2 = TRI->getSubReg(Reg, ARM::dsub_2);
357 D3 = TRI->getSubReg(Reg, ARM::dsub_3);
359 D0 = TRI->getSubReg(Reg, ARM::dsub_0);
360 D1 = TRI->getSubReg(Reg, ARM::dsub_2);
361 D2 = TRI->getSubReg(Reg, ARM::dsub_4);
362 D3 = TRI->getSubReg(Reg, ARM::dsub_6);
365 D0 = TRI->getSubReg(Reg, ARM::dsub_1);
366 D1 = TRI->getSubReg(Re
[all...] |
| H A D | ARMMCInstLower.cpp | 74 assert(!MO.getSubReg() && "Subregs should be eliminated!");
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| H A D | Thumb2ITBlockPass.cpp | 113 assert(MI->getOperand(0).getSubReg() == 0 &&
114 MI->getOperand(1).getSubReg() == 0 &&
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| /macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Mips/ |
| H A D | MipsSEFrameLowering.cpp | 90 MachineLocation SrcML0(RegInfo->getSubReg(Reg, Mips::sub_fpeven));
91 MachineLocation SrcML1(RegInfo->getSubReg(Reg, Mips::sub_fpodd));
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| H A D | MipsSEInstrInfo.cpp | 336 unsigned SubReg = getRegisterInfo().getSubReg(SrcReg, SubIdx);
351 BuildMI(MBB, I, dl, Mtc1Tdd, TRI.getSubReg(DstReg, Mips::sub_fpeven))
353 BuildMI(MBB, I, dl, Mtc1Tdd, TRI.getSubReg(DstReg, Mips::sub_fpodd))
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| /macosx-10.10.1/llvmCore-3425.0.34/include/llvm/CodeGen/ |
| H A D | MachineInstr.h | 641 return isCopy() && !getOperand(0).getSubReg() && !getOperand(1).getSubReg();
653 getOperand(0).getSubReg() == getOperand(1).getSubReg();
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| H A D | MachineOperand.h | 262 unsigned getSubReg() const { function in class:llvm::MachineOperand
326 return !isUndef() && !isInternalRead() && (isUse() || getSubReg());
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| /macosx-10.10.1/llvmCore-3425.0.34/lib/Target/ARM/InstPrinter/ |
| H A D | ARMInstPrinter.cpp | 1090 unsigned Reg0 = MRI.getSubReg(Reg, ARM::dsub_0);
1091 unsigned Reg1 = MRI.getSubReg(Reg, ARM::dsub_1);
1099 unsigned Reg0 = MRI.getSubReg(Reg, ARM::dsub_0);
1100 unsigned Reg1 = MRI.getSubReg(Reg, ARM::dsub_2);
1135 unsigned Reg0 = MRI.getSubReg(Reg, ARM::dsub_0);
1136 unsigned Reg1 = MRI.getSubReg(Reg, ARM::dsub_1);
1167 unsigned Reg0 = MRI.getSubReg(Reg, ARM::dsub_0);
1168 unsigned Reg1 = MRI.getSubReg(Reg, ARM::dsub_2);
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| /macosx-10.10.1/llvmCore-3425.0.34/include/llvm/MC/ |
| H A D | MCRegisterInfo.h | 309 /// getSubReg - Returns the physical register number of sub-register "Index"
312 unsigned getSubReg(unsigned Reg, unsigned Idx) const;
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| /macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Hexagon/ |
| H A D | HexagonPeephole.cpp | 189 if (Src.getSubReg() != Hexagon::subreg_loreg)
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| /macosx-10.10.1/llvmCore-3425.0.34/lib/Target/PowerPC/ |
| H A D | PPCMCInstLower.cpp | 157 assert(!MO.getSubReg() && "Subregs should be eliminated!");
|