/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/X86/InstPrinter/ |
H A D | X86ATTInstPrinter.h | 30 virtual void printInst(const MCInst *MI, raw_ostream &OS, StringRef Annot); 34 bool printAliasInstr(const MCInst *MI, raw_ostream &OS); 37 void printInstruction(const MCInst *MI, raw_ostream &OS); 40 void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &OS); 41 void printMemReference(const MCInst *MI, unsigned Op, raw_ostream &OS); 42 void printSSECC(const MCInst *MI, unsigned Op, raw_ostream &OS); 43 void printPCRelImm(const MCInst *MI, unsigned OpNo, raw_ostream &OS); 45 void printopaquemem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { argument 46 printMemReference(MI, OpNo, O); 49 void printi8mem(const MCInst *MI, unsigne argument 52 printi16mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) argument 55 printi32mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) argument 58 printi64mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) argument 61 printi128mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) argument 64 printi256mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) argument 67 printf32mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) argument 70 printf64mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) argument 73 printf80mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) argument 76 printf128mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) argument 79 printf256mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) argument [all...] |
H A D | X86IntelInstPrinter.h | 31 virtual void printInst(const MCInst *MI, raw_ostream &OS, StringRef Annot); 34 void printInstruction(const MCInst *MI, raw_ostream &O); 37 void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 38 void printMemReference(const MCInst *MI, unsigned Op, raw_ostream &O); 39 void printSSECC(const MCInst *MI, unsigned Op, raw_ostream &O); 40 void printPCRelImm(const MCInst *MI, unsigned OpNo, raw_ostream &O); 42 void printopaquemem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { argument 44 printMemReference(MI, OpNo, O); 47 void printi8mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { argument 49 printMemReference(MI, OpN 51 printi16mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) argument 55 printi32mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) argument 59 printi64mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) argument 63 printi128mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) argument 67 printi256mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) argument 71 printf32mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) argument 75 printf64mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) argument 79 printf80mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) argument 83 printf128mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) argument 87 printf256mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) argument [all...] |
H A D | X86InstComments.cpp | 29 void llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, argument 35 switch (MI->getOpcode()) { 37 Src1Name = getRegName(MI->getOperand(0).getReg()); 38 Src2Name = getRegName(MI->getOperand(2).getReg()); 39 DecodeINSERTPSMask(MI->getOperand(3).getImm(), ShuffleMask); 42 DestName = getRegName(MI->getOperand(0).getReg()); 43 Src1Name = getRegName(MI->getOperand(1).getReg()); 44 Src2Name = getRegName(MI->getOperand(2).getReg()); 45 DecodeINSERTPSMask(MI->getOperand(3).getImm(), ShuffleMask); 49 Src2Name = getRegName(MI [all...] |
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/ARM/InstPrinter/ |
H A D | ARMInstPrinter.h | 29 virtual void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot); 33 void printInstruction(const MCInst *MI, raw_ostream &O); 37 void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 39 void printSORegRegOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 40 void printSORegImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 42 void printAddrModeTBB(const MCInst *MI, unsigned OpNum, raw_ostream &O); 43 void printAddrModeTBH(const MCInst *MI, unsigned OpNum, raw_ostream &O); 44 void printAddrMode2Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 45 void printAM2PostIndexOp(const MCInst *MI, unsigned OpNum, raw_ostream &O); 46 void printAM2PreOrOffsetIndexOp(const MCInst *MI, unsigne [all...] |
H A D | ARMInstPrinter.cpp | 67 void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O, argument 69 unsigned Opcode = MI->getOpcode(); 73 switch (MI->getOperand(0).getImm()) { 81 printInstruction(MI, O); 85 printPredicateOperand(MI, 1, O); 95 const MCOperand &Dst = MI->getOperand(0); 96 const MCOperand &MO1 = MI->getOperand(1); 97 const MCOperand &MO2 = MI->getOperand(2); 98 const MCOperand &MO3 = MI->getOperand(3); 101 printSBitModifierOperand(MI, 238 printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) argument 263 printThumbLdrLabelOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 279 printSORegRegOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 297 printSORegImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 314 printAM2PreOrOffsetIndexOp(const MCInst *MI, unsigned Op, raw_ostream &O) argument 340 printAddrModeTBB(const MCInst *MI, unsigned Op, raw_ostream &O) argument 348 printAddrModeTBH(const MCInst *MI, unsigned Op, raw_ostream &O) argument 356 printAddrMode2Operand(const MCInst *MI, unsigned Op, raw_ostream &O) argument 375 printAddrMode2OffsetOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 400 printAM3PostIndexOp(const MCInst *MI, unsigned Op, raw_ostream &O) argument 420 printAM3PreOrOffsetIndexOp(const MCInst *MI, unsigned Op, raw_ostream &O) argument 445 printAddrMode3Operand(const MCInst *MI, unsigned Op, raw_ostream &O) argument 463 printAddrMode3OffsetOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 481 printPostIdxImm8Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 489 printPostIdxRegOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 497 printPostIdxImm8s4Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 506 printLdStmModeOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 513 printAddrMode5Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 535 printAddrMode6Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 548 printAddrMode7Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 554 printAddrMode6OffsetOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 564 printBitfieldInvMaskImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 575 printMemBOption(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 581 printShiftImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 592 printPKHLSLShiftImm(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 601 printPKHASRShiftImm(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 611 printRegisterList(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 621 printSetendOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 630 printCPSIMod(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 636 printCPSIFlag(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 648 printMSRMaskOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 728 printPredicateOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 738 printMandatoryPredicateOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 745 printSBitModifierOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 754 printNoHashImmediate(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 759 printPImmediate(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 764 printCImmediate(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 769 printCoprocOptionImm(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 774 printPCLabel(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 779 printAdrLabelOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 798 printThumbS4ImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 803 printThumbSRImm(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 809 printThumbITMask(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 826 printThumbAddrModeRROperand(const MCInst *MI, unsigned Op, raw_ostream &O) argument 842 printThumbAddrModeImm5SOperand(const MCInst *MI, unsigned Op, raw_ostream &O, unsigned Scale) argument 860 printThumbAddrModeImm5S1Operand(const MCInst *MI, unsigned Op, raw_ostream &O) argument 866 printThumbAddrModeImm5S2Operand(const MCInst *MI, unsigned Op, raw_ostream &O) argument 872 printThumbAddrModeImm5S4Operand(const MCInst *MI, unsigned Op, raw_ostream &O) argument 878 printThumbAddrModeSPOperand(const MCInst *MI, unsigned Op, raw_ostream &O) argument 887 printT2SOOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument 901 printAddrModeImm12Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument [all...] |
/macosx-10.10.1/llvmCore-3425.0.34/lib/CodeGen/ |
H A D | ExpandPostRAPseudos.cpp | 49 bool LowerSubregToReg(MachineInstr *MI); 50 bool LowerCopy(MachineInstr *MI); 52 void TransferDeadFlag(MachineInstr *MI, unsigned DstReg, 54 void TransferImplicitDefs(MachineInstr *MI); 64 /// TransferDeadFlag - MI is a pseudo-instruction with DstReg dead, 68 ExpandPostRA::TransferDeadFlag(MachineInstr *MI, unsigned DstReg, argument 71 prior(MachineBasicBlock::iterator(MI)); ; --MII) { 74 assert(MII != MI->getParent()->begin() && 79 /// TransferImplicitDefs - MI is a pseudo-instruction, and the lowered 81 /// operands from MI t 83 TransferImplicitDefs(MachineInstr *MI) argument 95 LowerSubregToReg(MachineInstr *MI) argument 150 LowerCopy(MachineInstr *MI) argument 202 MachineInstr *MI = mi; local [all...] |
H A D | AntiDepBreaker.h | 54 virtual void Observe(MachineInstr *MI, unsigned Count, 62 void UpdateDbgValue(MachineInstr *MI, unsigned OldReg, unsigned NewReg) { argument 63 assert (MI->isDebugValue() && "MI is not DBG_VALUE!"); 64 if (MI && MI->getOperand(0).isReg() && MI->getOperand(0).getReg() == OldReg) 65 MI->getOperand(0).setReg(NewReg);
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H A D | TargetInstrInfoImpl.cpp | 61 MachineInstr *TargetInstrInfoImpl::commuteInstruction(MachineInstr *MI, argument 63 const MCInstrDesc &MCID = MI->getDesc(); 65 if (HasDef && !MI->getOperand(0).isReg()) 69 if (!findCommutedOpIndices(MI, Idx1, Idx2)) { 72 Msg << "Don't know how to commute: " << *MI; local 76 assert(MI->getOperand(Idx1).isReg() && MI->getOperand(Idx2).isReg() && 78 unsigned Reg0 = HasDef ? MI->getOperand(0).getReg() : 0; 79 unsigned Reg1 = MI->getOperand(Idx1).getReg(); 80 unsigned Reg2 = MI 122 findCommutedOpIndices(MachineInstr *MI, unsigned &SrcOpIdx1, unsigned &SrcOpIdx2) const argument 156 PredicateInstruction(MachineInstr *MI, const SmallVectorImpl<MachineOperand> &Pred) const argument 186 hasLoadFromStackSlot(const MachineInstr *MI, const MachineMemOperand *&MMO, int &FrameIndex) const argument 204 hasStoreToStackSlot(const MachineInstr *MI, const MachineMemOperand *&MMO, int &FrameIndex) const argument 228 MachineInstr *MI = MBB.getParent()->CloneMachineInstr(Orig); local 249 canFoldCopy(const MachineInstr *MI, unsigned FoldIdx) argument 282 canFoldMemoryOperand(const MachineInstr *MI, const SmallVectorImpl<unsigned> &Ops) const argument 294 foldMemoryOperand(MachineBasicBlock::iterator MI, const SmallVectorImpl<unsigned> &Ops, int FI) const argument 352 foldMemoryOperand(MachineBasicBlock::iterator MI, const SmallVectorImpl<unsigned> &Ops, MachineInstr* LoadMI) const argument 377 isReallyTriviallyReMaterializableGeneric(const MachineInstr *MI, AliasAnalysis *AA) const argument 462 isSchedulingBoundary(const MachineInstr *MI, const MachineBasicBlock *MBB, const MachineFunction &MF) const argument 576 getInstrLatency(const InstrItineraryData *ItinData, const MachineInstr *MI, unsigned *PredCost) const argument [all...] |
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/PowerPC/InstPrinter/ |
H A D | PPCInstPrinter.cpp | 30 void PPCInstPrinter::printInst(const MCInst *MI, raw_ostream &O, argument 33 if (MI->getOpcode() == PPC::RLWINM) { 34 unsigned char SH = MI->getOperand(2).getImm(); 35 unsigned char MB = MI->getOperand(3).getImm(); 36 unsigned char ME = MI->getOperand(4).getImm(); 46 printOperand(MI, 0, O); 48 printOperand(MI, 1, O); 56 if ((MI->getOpcode() == PPC::OR || MI->getOpcode() == PPC::OR8) && 57 MI 86 printPredicateOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O, const char *Modifier) argument 137 printS5ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) argument 144 printU5ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) argument 151 printU6ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) argument 158 printS16ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) argument 163 printU16ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) argument 168 printS16X4ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) argument 176 printBranchOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) argument 187 printAbsAddrOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) argument 193 printcrbitm(const MCInst *MI, unsigned OpNo, raw_ostream &O) argument 211 printMemRegImm(const MCInst *MI, unsigned OpNo, raw_ostream &O) argument 222 printMemRegImmShifted(const MCInst *MI, unsigned OpNo, raw_ostream &O) argument 238 printMemRegReg(const MCInst *MI, unsigned OpNo, raw_ostream &O) argument 266 printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) argument 288 printSymbolLo(const MCInst *MI, unsigned OpNo, raw_ostream &O) argument 305 printSymbolHi(const MCInst *MI, unsigned OpNo, raw_ostream &O) argument [all...] |
H A D | PPCInstPrinter.h | 36 virtual void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot); 39 void printInstruction(const MCInst *MI, raw_ostream &O); 43 void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 44 void printPredicateOperand(const MCInst *MI, unsigned OpNo, 48 void printS5ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 49 void printU5ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 50 void printU6ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 51 void printS16ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 52 void printU16ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 53 void printS16X4ImmOperand(const MCInst *MI, unsigne [all...] |
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Hexagon/InstPrinter/ |
H A D | HexagonInstPrinter.h | 28 virtual void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot); 29 void printInst(const HexagonMCInst *MI, raw_ostream &O, StringRef Annot); 31 void printInstruction(const MCInst *MI, raw_ostream &O); 35 void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) const; 36 void printImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) const; 37 void printExtOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) const; 38 void printUnsignedImmOperand(const MCInst *MI, unsigned OpNo, 40 void printNegImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) 42 void printNOneImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) 44 void printMEMriOperand(const MCInst *MI, unsigne 63 printSymbolHi(const MCInst *MI, unsigned OpNo, raw_ostream &O) const argument 65 printSymbolLo(const MCInst *MI, unsigned OpNo, raw_ostream &O) const argument [all...] |
H A D | HexagonInstPrinter.cpp | 39 void HexagonInstPrinter::printInst(const MCInst *MI, raw_ostream &O, argument 41 printInst((const HexagonMCInst*)(MI), O, Annot); 44 void HexagonInstPrinter::printInst(const HexagonMCInst *MI, raw_ostream &O, argument 50 if (MI->getOpcode() == Hexagon::ENDLOOP0) { 52 assert(MI->isEndPacket() && "Loop end must also end the packet"); 54 if (MI->isStartPacket()) { 61 Nop.setStartPacket (MI->isStartPacket()); 66 if (MI->isEndPacket()) 69 printInstruction(MI, O); 73 if (MI 88 printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) const argument 103 printImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) const argument 108 printExtOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) const argument 113 printUnsignedImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) const argument 118 printNegImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) const argument 123 printNOneImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) const argument 128 printMEMriOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) const argument 137 printFrameIndexOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) const argument 145 printGlobalOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) const argument 152 printJumpTable(const MCInst *MI, unsigned OpNo, raw_ostream &O) const argument 159 printConstantPool(const MCInst *MI, unsigned OpNo, raw_ostream &O) const argument 166 printBranchOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) const argument 173 printCallOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) const argument 177 printAbsAddrOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) const argument 181 printPredicateOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) const argument 185 printSymbol(const MCInst *MI, unsigned OpNo, raw_ostream &O, bool hi) const argument [all...] |
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Hexagon/ |
H A D | HexagonAsmPrinter.h | 39 virtual void EmitInstruction(const MachineInstr *MI); 43 void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O); 44 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 47 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 55 void printInstruction(const MachineInstr *MI, raw_ostream &O); 57 // void printMachineInstruction(const MachineInstr *MI); 69 void printImmOperand(const MachineInstr *MI, unsigned OpNo, argument 71 int value = MI->getOperand(OpNo).getImm(); 75 void printNegImmOperand(const MachineInstr *MI, unsigned OpNo, argument 77 int value = MI 81 printMEMriOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O) argument 91 printFrameIndexOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O) argument 101 printBranchOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O) argument 112 printCallOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O) argument 116 printAbsAddrOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O) argument 120 printSymbolHi(const MachineInstr *MI, unsigned OpNo, raw_ostream &O) argument 131 printSymbolLo(const MachineInstr *MI, unsigned OpNo, raw_ostream &O) argument [all...] |
H A D | HexagonSplitTFRCondSets.cpp | 83 MachineInstr *MI = MII; local 85 switch(MI->getOpcode()) { 89 int DestReg = MI->getOperand(0).getReg(); 90 int SrcReg1 = MI->getOperand(2).getReg(); 91 int SrcReg2 = MI->getOperand(3).getReg(); 93 if (MI->getOpcode() == Hexagon::TFR_condset_rr || 94 MI->getOpcode() == Hexagon::TFR_condset_rr_f) { 98 else if (MI->getOpcode() == Hexagon::TFR_condset_rr64_f) { 106 BuildMI(*MBB, MII, MI->getDebugLoc(), TII->get(Opc1), 107 DestReg).addReg(MI [all...] |
H A D | HexagonMachineFunctionInfo.h | 45 void addAllocaAdjustInst(MachineInstr* MI) { argument 46 AllocaAdjustInsts.push_back(MI); 55 void setStartPacket(MachineInstr* MI) { argument 56 PacketInfo[MI] |= Hexagon::StartPacket; 58 void setEndPacket(MachineInstr* MI) { argument 59 PacketInfo[MI] |= Hexagon::EndPacket; 61 bool isStartPacket(const MachineInstr* MI) const { 62 return (PacketInfo.count(MI) && 63 (PacketInfo.find(MI)->second & Hexagon::StartPacket)); 65 bool isEndPacket(const MachineInstr* MI) cons [all...] |
H A D | HexagonRegisterInfo.cpp | 123 MachineInstr &MI = *I; local 125 if (MI.getOpcode() == Hexagon::ADJCALLSTACKDOWN) { 127 } else if (MI.getOpcode() == Hexagon::ADJCALLSTACKUP) { 144 MachineInstr &MI = *II; local 145 while (!MI.getOperand(i).isFI()) { 147 assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!"); 150 int FrameIndex = MI.getOperand(i).getIndex(); 153 MachineFunction &MF = *MI.getParent()->getParent(); 167 TII.isValidOffset(MI.getOpcode(), (FrameSize+Offset)) && 168 !TII.isSpillPredRegOp(&MI)) { [all...] |
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/MBlaze/InstPrinter/ |
H A D | MBlazeInstPrinter.cpp | 28 void MBlazeInstPrinter::printInst(const MCInst *MI, raw_ostream &O, argument 30 printInstruction(MI, O); 34 void MBlazeInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, argument 37 const MCOperand &Op = MI->getOperand(OpNo); 48 void MBlazeInstPrinter::printFSLImm(const MCInst *MI, int OpNo, argument 50 const MCOperand &MO = MI->getOperand(OpNo); 54 printOperand(MI, OpNo, O, NULL); 57 void MBlazeInstPrinter::printUnsignedImm(const MCInst *MI, int OpNo, argument 59 const MCOperand &MO = MI->getOperand(OpNo); 63 printOperand(MI, OpN 66 printMemOperand(const MCInst *MI, int OpNo, raw_ostream &O, const char *Modifier) argument [all...] |
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/ARM/ |
H A D | ARMCodeEmitter.cpp | 77 uint64_t getBinaryCodeForInstr(const MachineInstr &MI) const; 85 void emitInstruction(const MachineInstr &MI); 91 void emitConstPoolInstruction(const MachineInstr &MI); 92 void emitMOVi32immInstruction(const MachineInstr &MI); 93 void emitMOVi2piecesInstruction(const MachineInstr &MI); 94 void emitLEApcrelJTInstruction(const MachineInstr &MI); 95 void emitPseudoMoveInstruction(const MachineInstr &MI); 97 void emitPseudoInstruction(const MachineInstr &MI); 98 unsigned getMachineSoRegOpValue(const MachineInstr &MI, 104 unsigned getAddrModeSBit(const MachineInstr &MI, 152 getMachineOpValue(const MachineInstr &MI, unsigned OpIdx) const argument 164 NEONThumb2DataIPostEncoder(const MachineInstr &MI, unsigned Val) const argument 166 NEONThumb2LoadStorePostEncoder(const MachineInstr &MI,unsigned Val) const argument 168 NEONThumb2DupPostEncoder(const MachineInstr &MI,unsigned Val) const argument 172 getAdrLabelOpValue(const MachineInstr &MI, unsigned Op) const argument 174 getThumbAdrLabelOpValue(const MachineInstr &MI, unsigned Op) const argument 176 getThumbBLTargetOpValue(const MachineInstr &MI, unsigned Op) const argument 178 getThumbBLXTargetOpValue(const MachineInstr &MI, unsigned Op) const argument 180 getThumbBRTargetOpValue(const MachineInstr &MI, unsigned Op) const argument 182 getThumbBCCTargetOpValue(const MachineInstr &MI, unsigned Op) const argument 184 getThumbCBTargetOpValue(const MachineInstr &MI, unsigned Op) const argument 186 getBranchTargetOpValue(const MachineInstr &MI, unsigned Op) const argument 188 getUnconditionalBranchTargetOpValue(const MachineInstr &MI, unsigned Op) const argument 190 getARMBranchTargetOpValue(const MachineInstr &MI, unsigned Op) const argument 192 getARMBLTargetOpValue(const MachineInstr &MI, unsigned Op) const argument 194 getARMBLXTargetOpValue(const MachineInstr &MI, unsigned Op) const argument 196 getCCOutOpValue(const MachineInstr &MI, unsigned Op) const argument 198 getSOImmOpValue(const MachineInstr &MI, unsigned Op) const argument 200 getT2SOImmOpValue(const MachineInstr &MI, unsigned Op) const argument 202 getSORegRegOpValue(const MachineInstr &MI, unsigned Op) const argument 204 getSORegImmOpValue(const MachineInstr &MI, unsigned Op) const argument 206 getThumbAddrModeRegRegOpValue(const MachineInstr &MI, unsigned Op) const argument 208 getT2AddrModeImm12OpValue(const MachineInstr &MI, unsigned Op) const argument 210 getT2AddrModeImm8OpValue(const MachineInstr &MI, unsigned Op) const argument 212 getT2Imm8s4OpValue(const MachineInstr &MI, unsigned Op) const argument 214 getT2AddrModeImm8s4OpValue(const MachineInstr &MI, unsigned Op) const argument 216 getT2AddrModeImm0_1020s4OpValue(const MachineInstr &MI,unsigned Op) const argument 218 getT2AddrModeImm8OffsetOpValue(const MachineInstr &MI, unsigned Op) const argument 220 getT2AddrModeImm12OffsetOpValue(const MachineInstr &MI,unsigned Op) const argument 222 getT2AddrModeSORegOpValue(const MachineInstr &MI, unsigned Op) const argument 224 getT2SORegOpValue(const MachineInstr &MI, unsigned Op) const argument 226 getT2AdrLabelOpValue(const MachineInstr &MI, unsigned Op) const argument 228 getAddrMode6AddressOpValue(const MachineInstr &MI, unsigned Op) const argument 230 getAddrMode6OneLane32AddressOpValue(const MachineInstr &MI, unsigned Op) const argument 233 getAddrMode6DupAddressOpValue(const MachineInstr &MI, unsigned Op) const argument 235 getAddrMode6OffsetOpValue(const MachineInstr &MI, unsigned Op) const argument 237 getBitfieldInvertedMaskOpValue(const MachineInstr &MI, unsigned Op) const argument 239 getSsatBitPosValue(const MachineInstr &MI, unsigned Op) const argument 241 getLdStmModeOpValue(const MachineInstr &MI, unsigned OpIdx) const argument 243 getLdStSORegOpValue(const MachineInstr &MI, unsigned OpIdx) const argument 246 getAddrModeImm12OpValue(const MachineInstr &MI, unsigned Op) const argument 267 getHiLo16ImmOpValue(const MachineInstr &MI, unsigned Op) const argument 271 getAddrMode2OpValue(const MachineInstr &MI, unsigned OpIdx) const argument 273 getAddrMode2OffsetOpValue(const MachineInstr &MI, unsigned OpIdx) const argument 275 getPostIdxRegOpValue(const MachineInstr &MI, unsigned OpIdx) const argument 277 getAddrMode3OffsetOpValue(const MachineInstr &MI, unsigned OpIdx) const argument 279 getAddrMode3OpValue(const MachineInstr &MI, unsigned Op) const argument 281 getAddrModeThumbSPOpValue(const MachineInstr &MI, unsigned Op) const argument 283 getAddrModeSOpValue(const MachineInstr &MI, unsigned Op) const argument 285 getAddrModeISOpValue(const MachineInstr &MI, unsigned Op) const argument 287 getAddrModePCOpValue(const MachineInstr &MI, unsigned Op) const argument 289 getAddrMode5OpValue(const MachineInstr &MI, unsigned Op) const argument 320 getNEONVcvtImm32OpValue(const MachineInstr &MI, unsigned Op) const argument 323 getRegisterListOpValue(const MachineInstr &MI, unsigned Op) const argument 326 getShiftRight8Imm(const MachineInstr &MI, unsigned Op) const argument 328 getShiftRight16Imm(const MachineInstr &MI, unsigned Op) const argument 330 getShiftRight32Imm(const MachineInstr &MI, unsigned Op) const argument 332 getShiftRight64Imm(const MachineInstr &MI, unsigned Op) const argument 421 getMovi32Value(const MachineInstr &MI, const MachineOperand &MO, unsigned Reloc) argument 446 getMachineOpValue(const MachineInstr &MI, const MachineOperand &MO) const argument 533 emitInstruction(const MachineInstr &MI) argument 626 emitConstPoolInstruction(const MachineInstr &MI) argument 689 emitMOVi32immInstruction(const MachineInstr &MI) argument 725 emitMOVi2piecesInstruction(const MachineInstr &MI) argument 767 emitLEApcrelJTInstruction(const MachineInstr &MI) argument 794 emitPseudoMoveInstruction(const MachineInstr &MI) argument 839 emitPseudoInstruction(const MachineInstr &MI) argument 922 getMachineSoRegOpValue(const MachineInstr &MI, const MCInstrDesc &MCID, const MachineOperand &MO, unsigned OpIdx) argument 992 getAddrModeSBit(const MachineInstr &MI, const MCInstrDesc &MCID) const argument 1002 emitDataProcessingInstruction(const MachineInstr &MI, unsigned ImplicitRd, unsigned ImplicitRn) argument 1100 emitLoadStoreInstruction(const MachineInstr &MI, unsigned ImplicitRd, unsigned ImplicitRn) argument 1179 emitMiscLoadStoreInstruction(const MachineInstr &MI, unsigned ImplicitRn) argument 1265 emitLoadStoreMultipleInstruction(const MachineInstr &MI) argument [all...] |
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/CellSPU/ |
H A D | SPUAsmPrinter.cpp | 51 void printInstruction(const MachineInstr *MI, raw_ostream &OS); 55 void EmitInstruction(const MachineInstr *MI) { argument 58 printInstruction(MI, OS); 63 void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O) { argument 64 const MachineOperand &MO = MI->getOperand(OpNo); 74 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 77 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 83 printU7ImmOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O) argument 85 unsigned int value = MI->getOperand(OpNo).getImm(); 91 printShufAddr(const MachineInstr *MI, unsigne [all...] |
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Mips/ |
H A D | MipsCodeEmitter.cpp | 82 uint64_t getBinaryCodeForInstr(const MachineInstr &MI) const; 84 void emitInstruction(const MachineInstr &MI); 101 unsigned getMachineOpValue(const MachineInstr &MI, 104 unsigned getRelocation(const MachineInstr &MI, 107 unsigned getJumpTargetOpValue(const MachineInstr &MI, unsigned OpNo) const; 109 unsigned getBranchTargetOpValue(const MachineInstr &MI, 111 unsigned getMemEncoding(const MachineInstr &MI, unsigned OpNo) const; 112 unsigned getSizeExtEncoding(const MachineInstr &MI, unsigned OpNo) const; 113 unsigned getSizeInsEncoding(const MachineInstr &MI, unsigned OpNo) const; 115 int emitULW(const MachineInstr &MI); 156 getRelocation(const MachineInstr &MI, const MachineOperand &MO) const argument 171 getJumpTargetOpValue(const MachineInstr &MI, unsigned OpNo) const argument 185 getBranchTargetOpValue(const MachineInstr &MI, unsigned OpNo) const argument 192 getMemEncoding(const MachineInstr &MI, unsigned OpNo) const argument 200 getSizeExtEncoding(const MachineInstr &MI, unsigned OpNo) const argument 206 getSizeInsEncoding(const MachineInstr &MI, unsigned OpNo) const argument 215 getMachineOpValue(const MachineInstr &MI, const MachineOperand &MO) const argument 274 emitUSW(const MachineInstr &MI) argument 287 emitULW(const MachineInstr &MI) argument 314 emitUSH(const MachineInstr &MI) argument 331 emitULH(const MachineInstr &MI) argument 351 emitULHu(const MachineInstr &MI) argument 371 emitInstruction(const MachineInstr &MI) argument [all...] |
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/PowerPC/ |
H A D | PPCCodeEmitter.cpp | 53 uint64_t getBinaryCodeForInstr(const MachineInstr &MI) const; 60 unsigned getMachineOpValue(const MachineInstr &MI, 63 unsigned get_crbitm_encoding(const MachineInstr &MI, unsigned OpNo) const; 64 unsigned getDirectBrEncoding(const MachineInstr &MI, unsigned OpNo) const; 65 unsigned getCondBrEncoding(const MachineInstr &MI, unsigned OpNo) const; 67 unsigned getHA16Encoding(const MachineInstr &MI, unsigned OpNo) const; 68 unsigned getLO16Encoding(const MachineInstr &MI, unsigned OpNo) const; 69 unsigned getMemRIEncoding(const MachineInstr &MI, unsigned OpNo) const; 70 unsigned getMemRIXEncoding(const MachineInstr &MI, unsigned OpNo) const; 114 const MachineInstr &MI local 138 get_crbitm_encoding(const MachineInstr &MI, unsigned OpNo) const argument 180 getDirectBrEncoding(const MachineInstr &MI, unsigned OpNo) const argument 189 getCondBrEncoding(const MachineInstr &MI, unsigned OpNo) const argument 196 getHA16Encoding(const MachineInstr &MI, unsigned OpNo) const argument 205 getLO16Encoding(const MachineInstr &MI, unsigned OpNo) const argument 214 getMemRIEncoding(const MachineInstr &MI, unsigned OpNo) const argument 230 getMemRIXEncoding(const MachineInstr &MI, unsigned OpNo) const argument 246 getMachineOpValue(const MachineInstr &MI, const MachineOperand &MO) const argument [all...] |
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Sparc/ |
H A D | SparcAsmPrinter.cpp | 40 void printOperand(const MachineInstr *MI, int opNum, raw_ostream &OS); 41 void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &OS, 43 void printCCOperand(const MachineInstr *MI, int opNum, raw_ostream &OS); 45 virtual void EmitInstruction(const MachineInstr *MI) { argument 48 printInstruction(MI, OS); 51 void printInstruction(const MachineInstr *MI, raw_ostream &OS);// autogen'd. 54 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 57 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 61 bool printGetPCX(const MachineInstr *MI, unsigned OpNo, raw_ostream &OS); 66 virtual MachineLocation getDebugValueLocation(const MachineInstr *MI) cons 72 printOperand(const MachineInstr *MI, int opNum, raw_ostream &O) argument 111 printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O, const char *Modifier) argument 140 printGetPCX(const MachineInstr *MI, unsigned opNum, raw_ostream &O) argument 174 printCCOperand(const MachineInstr *MI, int opNum, raw_ostream &O) argument 182 PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, unsigned AsmVariant, const char *ExtraCode, raw_ostream &O) argument 203 PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, unsigned AsmVariant, const char *ExtraCode, raw_ostream &O) argument [all...] |
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/PowerPC/MCTargetDesc/ |
H A D | PPCMCCodeEmitter.cpp | 38 unsigned getDirectBrEncoding(const MCInst &MI, unsigned OpNo, 40 unsigned getCondBrEncoding(const MCInst &MI, unsigned OpNo, 42 unsigned getHA16Encoding(const MCInst &MI, unsigned OpNo, 44 unsigned getLO16Encoding(const MCInst &MI, unsigned OpNo, 46 unsigned getMemRIEncoding(const MCInst &MI, unsigned OpNo, 48 unsigned getMemRIXEncoding(const MCInst &MI, unsigned OpNo, 50 unsigned get_crbitm_encoding(const MCInst &MI, unsigned OpNo, 55 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO, 60 uint64_t getBinaryCodeForInstr(const MCInst &MI, 62 void EncodeInstruction(const MCInst &MI, raw_ostrea argument 87 getDirectBrEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl<MCFixup> &Fixups) const argument 98 getCondBrEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl<MCFixup> &Fixups) const argument 109 getHA16Encoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl<MCFixup> &Fixups) const argument 120 getLO16Encoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl<MCFixup> &Fixups) const argument 131 getMemRIEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl<MCFixup> &Fixups) const argument 149 getMemRIXEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl<MCFixup> &Fixups) const argument 168 get_crbitm_encoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl<MCFixup> &Fixups) const argument 178 getMachineOpValue(const MCInst &MI, const MCOperand &MO, SmallVectorImpl<MCFixup> &Fixups) const argument [all...] |
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/MSP430/ |
H A D | MSP430AsmPrinter.cpp | 49 void printOperand(const MachineInstr *MI, int OpNum, 51 void printSrcMemOperand(const MachineInstr *MI, int OpNum, 53 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 56 bool PrintAsmMemoryOperand(const MachineInstr *MI, 59 void EmitInstruction(const MachineInstr *MI); 64 void MSP430AsmPrinter::printOperand(const MachineInstr *MI, int OpNum, argument 66 const MachineOperand &MO = MI->getOperand(OpNum); 111 void MSP430AsmPrinter::printSrcMemOperand(const MachineInstr *MI, int OpNum, argument 113 const MachineOperand &Base = MI->getOperand(OpNum); 114 const MachineOperand &Disp = MI 133 PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, unsigned AsmVariant, const char *ExtraCode, raw_ostream &O) argument 144 PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, unsigned AsmVariant, const char *ExtraCode, raw_ostream &O) argument 156 EmitInstruction(const MachineInstr *MI) argument [all...] |
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/X86/ |
H A D | X86AsmPrinter.h | 47 virtual void EmitInstruction(const MachineInstr *MI); 52 void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O, 54 void printPCRelImm(const MachineInstr *MI, unsigned OpNo, raw_ostream &O); 57 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 60 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 64 void printMachineInstruction(const MachineInstr *MI); 65 void printSSECC(const MachineInstr *MI, unsigned Op, raw_ostream &O); 66 void printMemReference(const MachineInstr *MI, unsigned Op, raw_ostream &O, 68 void printLeaMemReference(const MachineInstr *MI, unsigned Op, raw_ostream &O, 71 void printPICLabel(const MachineInstr *MI, unsigne [all...] |