Searched refs:AM (Results 1 - 25 of 60) sorted by relevance

123

/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/MSP430/
H A DMSP430ISelDAGToDAG.cpp106 bool MatchAddress(SDValue N, MSP430ISelAddressMode &AM);
107 bool MatchWrapper(SDValue N, MSP430ISelAddressMode &AM);
108 bool MatchAddressBase(SDValue N, MSP430ISelAddressMode &AM);
139 bool MSP430DAGToDAGISel::MatchWrapper(SDValue N, MSP430ISelAddressMode &AM) { argument
142 if (AM.hasSymbolicDisplacement())
148 AM.GV = G->getGlobal();
149 AM.Disp += G->getOffset();
150 //AM.SymbolFlags = G->getTargetFlags();
152 AM.CP = CP->getConstVal();
153 AM
171 MatchAddressBase(SDValue N, MSP430ISelAddressMode &AM) argument
184 MatchAddress(SDValue N, MSP430ISelAddressMode &AM) argument
250 MSP430ISelAddressMode AM; local
303 ISD::MemIndexedMode AM = LD->getAddressingMode(); local
[all...]
H A DMSP430ISelLowering.h168 ISD::MemIndexedMode &AM,
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/X86/
H A DX86InstrBuilder.h123 const X86AddressMode &AM) {
124 assert(AM.Scale == 1 || AM.Scale == 2 || AM.Scale == 4 || AM.Scale == 8);
126 if (AM.BaseType == X86AddressMode::RegBase)
127 MIB.addReg(AM.Base.Reg);
129 assert(AM.BaseType == X86AddressMode::FrameIndexBase);
130 MIB.addFrameIndex(AM.Base.FrameIndex);
133 MIB.addImm(AM
122 addFullAddress(const MachineInstrBuilder &MIB, const X86AddressMode &AM) argument
[all...]
H A DX86ISelDAGToDAG.cpp196 bool FoldOffsetIntoAddress(uint64_t Offset, X86ISelAddressMode &AM);
197 bool MatchLoadInAddress(LoadSDNode *N, X86ISelAddressMode &AM);
198 bool MatchWrapper(SDValue N, X86ISelAddressMode &AM);
199 bool MatchAddress(SDValue N, X86ISelAddressMode &AM);
200 bool MatchAddressRecursively(SDValue N, X86ISelAddressMode &AM,
202 bool MatchAddressBase(SDValue N, X86ISelAddressMode &AM);
231 inline void getAddressOperands(X86ISelAddressMode &AM, SDValue &Base, argument
234 Base = (AM.BaseType == X86ISelAddressMode::FrameIndexBase) ?
235 CurDAG->getTargetFrameIndex(AM.Base_FrameIndex, TLI.getPointerTy()) :
236 AM
578 FoldOffsetIntoAddress(uint64_t Offset, X86ISelAddressMode &AM) argument
597 MatchLoadInAddress(LoadSDNode *N, X86ISelAddressMode &AM) argument
625 MatchWrapper(SDValue N, X86ISelAddressMode &AM) argument
720 MatchAddress(SDValue N, X86ISelAddressMode &AM) argument
765 FoldMaskAndShiftToExtract(SelectionDAG &DAG, SDValue N, uint64_t Mask, SDValue Shift, SDValue X, X86ISelAddressMode &AM) argument
808 FoldMaskedShiftToScaledMask(SelectionDAG &DAG, SDValue N, uint64_t Mask, SDValue Shift, SDValue X, X86ISelAddressMode &AM) argument
875 FoldMaskAndShiftToScale(SelectionDAG &DAG, SDValue N, uint64_t Mask, SDValue Shift, SDValue X, X86ISelAddressMode &AM) argument
956 MatchAddressRecursively(SDValue N, X86ISelAddressMode &AM, unsigned Depth) argument
1267 MatchAddressBase(SDValue N, X86ISelAddressMode &AM) argument
1297 X86ISelAddressMode AM; local
1382 X86ISelAddressMode AM; local
1446 X86ISelAddressMode AM; local
[all...]
H A DX86FastISel.cpp83 bool X86FastEmitLoad(EVT VT, const X86AddressMode &AM, unsigned &RR);
85 bool X86FastEmitStore(EVT VT, const Value *Val, const X86AddressMode &AM);
86 bool X86FastEmitStore(EVT VT, unsigned Val, const X86AddressMode &AM);
91 bool X86SelectAddress(const Value *V, X86AddressMode &AM);
92 bool X86SelectCallAddress(const Value *V, X86AddressMode &AM);
178 bool X86FastISel::X86FastEmitLoad(EVT VT, const X86AddressMode &AM, argument
228 DL, TII.get(Opc), ResultReg), AM);
237 X86FastISel::X86FastEmitStore(EVT VT, unsigned Val, const X86AddressMode &AM) { argument
278 DL, TII.get(Opc)), AM).addReg(Val);
283 const X86AddressMode &AM) {
282 X86FastEmitStore(EVT VT, const Value *Val, const X86AddressMode &AM) argument
339 X86SelectAddress(const Value *V, X86AddressMode &AM) argument
599 X86SelectCallAddress(const Value *V, X86AddressMode &AM) argument
1450 X86AddressMode AM; local
1457 X86AddressMode AM; local
1787 X86AddressMode AM; local
2084 X86AddressMode AM; local
2199 X86AddressMode AM; local
[all...]
/macosx-10.10.1/llvmCore-3425.0.34/include/llvm/Transforms/Utils/
H A DAddrModeMatcher.h50 static inline raw_ostream &operator<<(raw_ostream &OS, const ExtAddrMode &AM) { argument
51 AM.print(OS);
75 Instruction *MI, ExtAddrMode &AM)
76 : AddrModeInsts(AMI), TLI(T), AccessTy(AT), MemoryInst(MI), AddrMode(AM) {
73 AddressingModeMatcher(SmallVectorImpl<Instruction*> &AMI, const TargetLowering &T, Type *AT, Instruction *MI, ExtAddrMode &AM) argument
/macosx-10.10.1/vim-55/runtime/ftplugin/
H A Dmrxvtrc.vim1 " Created : Wed 26 Apr 2006 01:20:53 AM CDT
2 " Modified : Fri 28 Apr 2006 03:24:01 AM CDT
/macosx-10.10.1/screen-22/screen/terminfo/
H A Dchecktc.c4 int CO, LI, AM, XN; variable
83 AM = tgetflag("am");
84 printf("Termcap: terminal does %sauto-wrap", AM ? "" : "not ");
86 if (AM)
99 if (AM)
/macosx-10.10.1/llvmCore-3425.0.34/lib/Transforms/Scalar/
H A DLoopStrengthReduce.cpp226 /// AM - This is used to represent complex addressing, as well as other kinds
228 TargetLowering::AddrMode AM; member in struct:__anon10395::Formula
231 /// non-empty, AM.HasBaseReg should be set to true.
235 /// when AM.Scale is not zero.
329 AM.HasBaseReg = true;
335 AM.HasBaseReg = true;
351 AM.BaseGV ? AM.BaseGV->getType() :
384 if (AM.BaseGV) {
386 WriteAsOperand(OS, AM
1272 isLegalUse(const TargetLowering::AddrMode &AM, LSRUse::KindType Kind, Type *AccessTy, const TargetLowering *TLI) argument
1329 isLegalUse(TargetLowering::AddrMode AM, int64_t MinOffset, int64_t MaxOffset, LSRUse::KindType Kind, Type *AccessTy, const TargetLowering *TLI) argument
2023 TargetLowering::AddrMode AM; local
[all...]
/macosx-10.10.1/tcl-105/tcl_ext/tclx/tclx/tests/compat/
H A Dclock.test42 } 0 {Sun Nov 04 03:02:46 AM 1990}
52 } 0 "Sun Nov 04 03:02:46 AM 1990 $large"
63 } 0 {02/14/92 12:00:00 AM}
119 foreach med {AM PM} {
/macosx-10.10.1/llvmCore-3425.0.34/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp319 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { argument
320 switch (AM) {
458 const char *AM = getIndexedModeName(LD->getAddressingMode()); local
459 if (*AM)
460 OS << ", " << AM; local
469 const char *AM = getIndexedModeName(ST->getAddressingMode()); local
470 if (*AM)
471 OS << ", " << AM; local
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Hexagon/
H A DHexagonISelLowering.h134 ISD::MemIndexedMode &AM,
145 /// by AM is legal for this target, for a load/store of the specified type.
149 virtual bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const;
/macosx-10.10.1/vim-55/runtime/indent/
H A Dsql.vim4 " Last Change: Thu Sep 15 2005 10:27:51 AM
/macosx-10.10.1/vim-55/runtime/syntax/
H A Dsql.vim4 " Last Change: Thu Sep 15 2005 10:30:02 AM
/macosx-10.10.1/llvmCore-3425.0.34/lib/Analysis/
H A DTypeBasedAliasAnalysis.cpp220 const MDNode *AM = LocA.TBAATag; local
221 if (!AM) return AliasAnalysis::alias(LocA, LocB);
226 if (Aliases(AM, BM))
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/ARM/
H A DARMISelLowering.h294 /// by AM is legal for this target, for a load/store of the specified type.
295 virtual bool isLegalAddressingMode(const AddrMode &AM, Type *Ty)const;
296 bool isLegalT2ScaledAddressingMode(const AddrMode &AM, EVT VT) const;
315 ISD::MemIndexedMode &AM,
323 ISD::MemIndexedMode &AM,
H A DARMISelDAGToDAG.cpp724 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) local
727 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC)
760 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) local
763 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC)
780 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) local
783 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC)
853 ISD::MemIndexedMode AM local
939 ISD::MemIndexedMode AM = LdSt->getAddressingMode(); local
1255 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) local
1328 ISD::MemIndexedMode AM = LD->getAddressingMode(); local
1401 ISD::MemIndexedMode AM = LD->getAddressingMode(); local
[all...]
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/NVPTX/
H A DNVPTXISelLowering.h85 /// by AM is legal for this target, for a load/store of the specified type
89 virtual bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const;
/macosx-10.10.1/vim-55/runtime/
H A Dmacmap.vim3 " Last Change: Thu Mar 09 09:00 AM 2006 EST
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/XCore/
H A DXCoreISelLowering.cpp1566 /// by AM is legal for this target, for a load/store of the specified type.
1568 XCoreTargetLowering::isLegalAddressingMode(const AddrMode &AM, argument
1571 return AM.Scale == 0 && isImmUs(AM.BaseOffs) && isImmUs4(AM.BaseOffs);
1575 if (AM.BaseGV) {
1576 return Size >= 4 && !AM.HasBaseReg && AM.Scale == 0 &&
1577 AM.BaseOffs%4 == 0;
1583 if (AM
[all...]
H A DXCoreISelLowering.h103 virtual bool isLegalAddressingMode(const AddrMode &AM,
/macosx-10.10.1/system_cmds-643.1.1/at.tproj/
H A Dparsetime.c30 * /NUMBER [DOT NUMBER] [AM|PM]\ /[MONTH NUMBER [NUMBER]] \
67 PM, AM, TOMORROW, TODAY, NOW, enumerator in enum:__anon12475
86 { "am", AM,0 }, /* morning times for 0-12 clock */
383 * [NUMBER [DOT NUMBER] [AM|PM]] [UTC]
411 /* check if an AM or PM specifier was given
414 case AM:
423 if (hour == 12) /* 12:xx AM is 00:xx, not 12:xx */
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/CellSPU/
H A DSPUISelLowering.h173 virtual bool isLegalAddressingMode(const AddrMode &AM,
/macosx-10.10.1/llvmCore-3425.0.34/include/llvm/CodeGen/
H A DSelectionDAGNodes.h611 static const char* getIndexedModeName(ISD::MemIndexedMode AM);
1612 unsigned numOperands, SDVTList VTs, ISD::MemIndexedMode AM,
1615 SubclassData |= AM << 2;
1616 assert(getAddressingMode() == AM && "MemIndexedMode encoding error!");
1650 ISD::MemIndexedMode AM, ISD::LoadExtType ETy, EVT MemVT,
1653 VTs, AM, MemVT, MMO) {
1681 ISD::MemIndexedMode AM, bool isTrunc, EVT MemVT,
1684 VTs, AM, MemVT, MMO) {
1611 LSBaseSDNode(ISD::NodeType NodeTy, DebugLoc dl, SDValue *Operands, unsigned numOperands, SDVTList VTs, ISD::MemIndexedMode AM, EVT MemVT, MachineMemOperand *MMO) argument
1649 LoadSDNode(SDValue *ChainPtrOff, DebugLoc dl, SDVTList VTs, ISD::MemIndexedMode AM, ISD::LoadExtType ETy, EVT MemVT, MachineMemOperand *MMO) argument
1680 StoreSDNode(SDValue *ChainValuePtrOff, DebugLoc dl, SDVTList VTs, ISD::MemIndexedMode AM, bool isTrunc, EVT MemVT, MachineMemOperand *MMO) argument
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/PowerPC/
H A DPPCISelLowering.h262 ISD::MemIndexedMode &AM,
342 /// by AM is legal for this target, for a load/store of the specified type.
343 virtual bool isLegalAddressingMode(const AddrMode &AM, Type *Ty)const;

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