/macosx-10.10/JavaScriptCore-7600.1.17/assembler/ |
H A D | ARMAssembler.cpp | 54 ARMWord ARMAssembler::getOp2(ARMWord imm) argument 58 if (imm <= 0xff) 59 return Op2Immediate | imm; 61 if ((imm & 0xff000000) == 0) { 62 imm <<= 8; 66 imm = (imm << 24) | (imm >> 8); 70 if ((imm & 0xff000000) == 0) { 71 imm << 91 genInt(int reg, ARMWord imm, bool positive) argument 200 getImm(ARMWord imm, int tmpReg, bool invert) argument 220 moveImm(ARMWord imm, int dest) argument 240 encodeComplexImm(ARMWord imm, int dest) argument [all...] |
H A D | MacroAssembler.h | 228 void poke(TrustedImmPtr imm, int index = 0) argument 230 storePtr(imm, addressForPoke(index)); 238 void pushToSaveImmediateWithoutTouchingRegisters(TrustedImm32 imm) argument 240 push(imm); 287 TrustedImm32 trustedImm32ForShift(Imm32 imm) argument 289 return TrustedImm32(imm.asTrustedImm32().m_value & 31); 293 void branchPtr(RelationalCondition cond, RegisterID op1, TrustedImmPtr imm, Label target) argument 295 branchPtr(cond, op1, imm).linkTo(target, this); 297 void branchPtr(RelationalCondition cond, RegisterID op1, ImmPtr imm, Label target) argument 299 branchPtr(cond, op1, imm) 307 branch32(RelationalCondition cond, RegisterID op1, TrustedImm32 imm, Label target) argument 312 branch32(RelationalCondition cond, RegisterID op1, Imm32 imm, Label target) argument 364 patchableBranch32(RelationalCondition cond, RegisterID reg, TrustedImm32 imm) argument 369 patchableBranch32(RelationalCondition cond, Address address, TrustedImm32 imm) argument 435 addPtr(TrustedImm32 imm, RegisterID srcDest) argument 440 addPtr(TrustedImmPtr imm, RegisterID dest) argument 445 addPtr(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 450 addPtr(TrustedImm32 imm, AbsoluteAddress address) argument 460 andPtr(TrustedImm32 imm, RegisterID srcDest) argument 465 andPtr(TrustedImmPtr imm, RegisterID srcDest) argument 470 lshiftPtr(Imm32 imm, RegisterID srcDest) argument 490 orPtr(TrustedImmPtr imm, RegisterID dest) argument 495 orPtr(TrustedImm32 imm, RegisterID dest) argument 505 subPtr(TrustedImm32 imm, RegisterID dest) argument 510 subPtr(TrustedImmPtr imm, RegisterID dest) argument 520 xorPtr(TrustedImm32 imm, RegisterID srcDest) argument 551 move(ImmPtr imm, RegisterID dest) argument 581 storePtr(TrustedImmPtr imm, ImplicitAddress address) argument 586 storePtr(ImmPtr imm, Address address) argument 591 storePtr(TrustedImmPtr imm, void* address) argument 596 storePtr(TrustedImm32 imm, ImplicitAddress address) argument 601 storePtr(TrustedImmPtr imm, BaseIndex address) argument 681 branchSubPtr(ResultCondition cond, TrustedImm32 imm, RegisterID dest) argument 703 addPtr(TrustedImm32 imm, RegisterID srcDest) argument 708 addPtr(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 713 addPtr(TrustedImm32 imm, Address address) argument 723 addPtr(TrustedImmPtr imm, RegisterID dest) argument 728 addPtr(TrustedImm32 imm, AbsoluteAddress address) argument 738 andPtr(TrustedImm32 imm, RegisterID srcDest) argument 743 andPtr(TrustedImmPtr imm, RegisterID srcDest) argument 748 lshiftPtr(Imm32 imm, RegisterID srcDest) argument 763 orPtr(TrustedImm32 imm, RegisterID dest) argument 768 orPtr(TrustedImmPtr imm, RegisterID dest) argument 778 orPtr(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 783 rotateRightPtr(TrustedImm32 imm, RegisterID srcDst) argument 793 subPtr(TrustedImm32 imm, RegisterID dest) argument 798 subPtr(TrustedImmPtr imm, RegisterID dest) argument 813 xorPtr(TrustedImm32 imm, RegisterID srcDest) argument 858 storePtr(TrustedImmPtr imm, ImplicitAddress address) argument 863 storePtr(TrustedImmPtr imm, BaseIndex address) argument 953 branchAddPtr(ResultCondition cond, TrustedImm32 imm, RegisterID dest) argument 963 branchSubPtr(ResultCondition cond, TrustedImm32 imm, RegisterID dest) argument 1011 shouldBlind(ImmPtr imm) argument 1059 rotationBlindConstant(ImmPtr imm) argument 1073 shouldBlind(Imm64 imm) argument 1127 rotationBlindConstant(Imm64 imm) argument 1141 convertInt32ToDouble(Imm32 imm, FPRegisterID dest) argument 1151 move(ImmPtr imm, RegisterID dest) argument 1159 move(Imm64 imm, RegisterID dest) argument 1167 and64(Imm32 imm, RegisterID dest) argument 1187 storePtr(ImmPtr imm, Address dest) argument 1197 store64(Imm64 imm, Address dest) argument 1209 shouldBlind(Imm32 imm) argument 1270 xorBlindConstant(Imm32 imm) argument 1277 additionBlindedConstant(Imm32 imm) argument 1289 andBlindedConstant(Imm32 imm) argument 1298 orBlindedConstant(Imm32 imm) argument 1313 add32(Imm32 imm, RegisterID dest) argument 1323 addPtr(Imm32 imm, RegisterID dest) argument 1333 and32(Imm32 imm, RegisterID dest) argument 1343 andPtr(Imm32 imm, RegisterID dest) argument 1353 and32(Imm32 imm, RegisterID src, RegisterID dest) argument 1364 move(Imm32 imm, RegisterID dest) argument 1372 or32(Imm32 imm, RegisterID src, RegisterID dest) argument 1383 or32(Imm32 imm, RegisterID dest) argument 1410 store32(Imm32 imm, Address dest) argument 1434 sub32(Imm32 imm, RegisterID dest) argument 1444 subPtr(Imm32 imm, RegisterID dest) argument 1454 xor32(Imm32 imm, RegisterID src, RegisterID dest) argument 1464 xor32(Imm32 imm, RegisterID dest) argument 1492 branchAdd32(ResultCondition cond, RegisterID src, Imm32 imm, RegisterID dest) argument 1508 branchMul32(ResultCondition cond, Imm32 imm, RegisterID src, RegisterID dest) argument 1526 branchSub32(ResultCondition cond, RegisterID src, Imm32 imm, RegisterID dest, RegisterID scratch) argument 1537 lshift32(Imm32 imm, RegisterID dest) argument 1547 rshift32(Imm32 imm, RegisterID dest) argument 1557 urshift32(Imm32 imm, RegisterID dest) argument [all...] |
H A D | MacroAssemblerX86_64.h | 62 void add32(TrustedImm32 imm, AbsoluteAddress address) argument 65 add32(imm, Address(scratchRegister)); 68 void and32(TrustedImm32 imm, AbsoluteAddress address) argument 71 and32(imm, Address(scratchRegister)); 80 void or32(TrustedImm32 imm, AbsoluteAddress address) argument 83 or32(imm, Address(scratchRegister)); 92 void sub32(TrustedImm32 imm, AbsoluteAddress address) argument 95 sub32(imm, Address(scratchRegister)); 120 void convertInt32ToDouble(TrustedImm32 imm, FPRegisterID dest) argument 122 move(imm, scratchRegiste 126 store32(TrustedImm32 imm, void* address) argument 142 store8(TrustedImm32 imm, void* address) argument 273 add64(TrustedImm32 imm, RegisterID srcDest) argument 281 add64(TrustedImm64 imm, RegisterID dest) argument 291 add64(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 296 add64(TrustedImm32 imm, Address address) argument 301 add64(TrustedImm32 imm, AbsoluteAddress address) argument 307 addPtrNoFlags(TrustedImm32 imm, RegisterID srcDest) argument 317 and64(TrustedImm32 imm, RegisterID srcDest) argument 322 and64(TrustedImmPtr imm, RegisterID srcDest) argument 328 lshift64(TrustedImm32 imm, RegisterID dest) argument 333 rshift64(TrustedImm32 imm, RegisterID dest) argument 353 or64(TrustedImm64 imm, RegisterID dest) argument 359 or64(TrustedImm32 imm, RegisterID dest) argument 376 or64(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 382 rotateRight64(TrustedImm32 imm, RegisterID srcDst) argument 392 sub64(TrustedImm32 imm, RegisterID dest) argument 400 sub64(TrustedImm64 imm, RegisterID dest) argument 420 xor64(TrustedImm32 imm, RegisterID srcDest) argument 479 store64(TrustedImm64 imm, ImplicitAddress address) argument 489 store64(TrustedImm64 imm, BaseIndex address) argument 652 branchAdd64(ResultCondition cond, TrustedImm32 imm, RegisterID dest) argument 672 branchSub64(ResultCondition cond, TrustedImm32 imm, RegisterID dest) argument [all...] |
H A D | MacroAssemblerARM64.h | 139 void add32(TrustedImm32 imm, RegisterID dest) argument 141 add32(imm, dest, dest); 144 void add32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 146 if (isUInt12(imm.m_value)) 147 m_assembler.add<32>(dest, src, UInt12(imm.m_value)); 148 else if (isUInt12(-imm.m_value)) 149 m_assembler.sub<32>(dest, src, UInt12(-imm.m_value)); 151 move(imm, getCachedDataTempRegisterIDAndInvalidate()); 156 void add32(TrustedImm32 imm, Address address) argument 160 if (isUInt12(imm 172 add32(TrustedImm32 imm, AbsoluteAddress address) argument 207 add64(TrustedImm32 imm, RegisterID dest) argument 222 add64(TrustedImm64 imm, RegisterID dest) argument 239 add64(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 254 add64(TrustedImm32 imm, Address address) argument 270 add64(TrustedImm32 imm, AbsoluteAddress address) argument 291 addPtrNoFlags(TrustedImm32 imm, RegisterID srcDest) argument 318 and32(TrustedImm32 imm, RegisterID dest) argument 323 and32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 347 and64(TrustedImm32 imm, RegisterID dest) argument 360 and64(TrustedImmPtr imm, RegisterID dest) argument 383 lshift32(RegisterID src, TrustedImm32 imm, RegisterID dest) argument 393 lshift32(TrustedImm32 imm, RegisterID dest) argument 403 lshift64(RegisterID src, TrustedImm32 imm, RegisterID dest) argument 413 lshift64(TrustedImm32 imm, RegisterID dest) argument 428 mul32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 454 or32(TrustedImm32 imm, RegisterID dest) argument 459 or32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 479 or32(TrustedImm32 imm, Address address) argument 496 or64(TrustedImm32 imm, RegisterID dest) argument 501 or64(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 514 or64(TrustedImm64 imm, RegisterID dest) argument 527 rotateRight64(TrustedImm32 imm, RegisterID srcDst) argument 537 rshift32(RegisterID src, TrustedImm32 imm, RegisterID dest) argument 547 rshift32(TrustedImm32 imm, RegisterID dest) argument 557 rshift64(RegisterID src, TrustedImm32 imm, RegisterID dest) argument 567 rshift64(TrustedImm32 imm, RegisterID dest) argument 577 sub32(TrustedImm32 imm, RegisterID dest) argument 592 sub32(TrustedImm32 imm, Address address) argument 608 sub32(TrustedImm32 imm, AbsoluteAddress address) argument 640 sub64(TrustedImm32 imm, RegisterID dest) argument 655 sub64(TrustedImm64 imm, RegisterID dest) argument 677 urshift32(RegisterID src, TrustedImm32 imm, RegisterID dest) argument 687 urshift32(TrustedImm32 imm, RegisterID dest) argument 702 xor32(TrustedImm32 imm, RegisterID dest) argument 707 xor32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 741 xor64(TrustedImm32 imm, RegisterID dest) argument 746 xor64(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 980 store64(TrustedImm64 imm, ImplicitAddress address) argument 991 store64(TrustedImm64 imm, BaseIndex address) argument 1036 store32(TrustedImm32 imm, ImplicitAddress address) argument 1047 store32(TrustedImm32 imm, BaseIndex address) argument 1058 store32(TrustedImm32 imm, const void* address) argument 1116 store8(TrustedImm32 imm, void* address) argument 1127 store8(TrustedImm32 imm, ImplicitAddress address) argument 1265 convertInt32ToDouble(TrustedImm32 imm, FPRegisterID dest) argument 1503 pushToSaveImmediateWithoutTouchingRegisters(TrustedImm32 imm) argument 1518 pushToSave(TrustedImm32 imm) argument 1546 move(TrustedImm32 imm, RegisterID dest) argument 1551 move(TrustedImmPtr imm, RegisterID dest) argument 1556 move(TrustedImm64 imm, RegisterID dest) argument 1892 branchAdd32(ResultCondition cond, RegisterID op1, TrustedImm32 imm, RegisterID dest) argument 1918 branchAdd32(ResultCondition cond, TrustedImm32 imm, RegisterID dest) argument 1923 branchAdd32(ResultCondition cond, TrustedImm32 imm, AbsoluteAddress address) argument 1948 branchAdd64(ResultCondition cond, RegisterID op1, TrustedImm32 imm, RegisterID dest) argument 1968 branchAdd64(ResultCondition cond, TrustedImm32 imm, RegisterID dest) argument 1999 branchMul32(ResultCondition cond, TrustedImm32 imm, RegisterID src, RegisterID dest) argument 2052 branchSub32(ResultCondition cond, RegisterID op1, TrustedImm32 imm, RegisterID dest) argument 2072 branchSub32(ResultCondition cond, TrustedImm32 imm, RegisterID dest) argument 2083 branchSub64(ResultCondition cond, RegisterID op1, TrustedImm32 imm, RegisterID dest) argument 2103 branchSub64(ResultCondition cond, TrustedImm32 imm, RegisterID dest) argument 2274 moveWithPatch(TrustedImm32 imm, RegisterID dest) argument 2281 moveWithPatch(TrustedImmPtr imm, RegisterID dest) argument 2325 patchableBranch32(RelationalCondition cond, RegisterID reg, TrustedImm32 imm) argument 2736 moveToCachedReg(TrustedImm32 imm, CachedTempRegister& dest) argument 2745 moveToCachedReg(TrustedImmPtr imm, CachedTempRegister& dest) argument 2754 moveToCachedReg(TrustedImm64 imm, CachedTempRegister& dest) argument [all...] |
H A D | X86Assembler.h | 365 void push_i32(int imm) argument 368 m_formatter.immediate32(imm); 384 void adcl_im(int imm, const void* addr) argument 386 if (CAN_SIGN_EXTEND_8_32(imm)) { 388 m_formatter.immediate8(imm); 391 m_formatter.immediate32(imm); 418 void addl_ir(int imm, RegisterID dst) argument 420 if (CAN_SIGN_EXTEND_8_32(imm)) { 422 m_formatter.immediate8(imm); 428 m_formatter.immediate32(imm); 432 addl_im(int imm, int offset, RegisterID base) argument 454 addq_ir(int imm, RegisterID dst) argument 468 addq_im(int imm, int offset, RegisterID base) argument 479 addl_im(int imm, const void* addr) argument 506 andl_ir(int imm, RegisterID dst) argument 517 andl_im(int imm, int offset, RegisterID base) argument 534 andq_ir(int imm, RegisterID dst) argument 545 andl_im(int imm, const void* addr) argument 623 orl_ir(int imm, RegisterID dst) argument 637 orl_im(int imm, int offset, RegisterID base) argument 654 orq_ir(int imm, RegisterID dst) argument 668 orl_im(int imm, const void* addr) argument 700 subl_ir(int imm, RegisterID dst) argument 714 subl_im(int imm, int offset, RegisterID base) argument 731 subq_ir(int imm, RegisterID dst) argument 745 subl_im(int imm, const void* addr) argument 772 xorl_im(int imm, int offset, RegisterID base) argument 783 xorl_ir(int imm, RegisterID dst) argument 803 xorq_ir(int imm, RegisterID dst) argument 822 rorq_i8r(int imm, RegisterID dst) argument 834 sarl_i8r(int imm, RegisterID dst) argument 849 shrl_i8r(int imm, RegisterID dst) argument 864 shll_i8r(int imm, RegisterID dst) argument 885 sarq_i8r(int imm, RegisterID dst) argument 895 shlq_i8r(int imm, RegisterID dst) argument 951 cmpl_ir(int imm, RegisterID dst) argument 965 cmpl_ir_force32(int imm, RegisterID dst) argument 971 cmpl_im(int imm, int offset, RegisterID base) argument 982 cmpb_im(int imm, int offset, RegisterID base) argument 988 cmpb_im(int imm, int offset, RegisterID base, RegisterID index, int scale) argument 995 cmpb_im(int imm, const void* addr) argument 1002 cmpl_im(int imm, int offset, RegisterID base, RegisterID index, int scale) argument 1013 cmpl_im_force32(int imm, int offset, RegisterID base) argument 1040 cmpq_ir(int imm, RegisterID dst) argument 1054 cmpq_im(int imm, int offset, RegisterID base) argument 1065 cmpq_im(int imm, int offset, RegisterID base, RegisterID index, int scale) argument 1081 cmpl_im(int imm, const void* addr) argument 1093 cmpw_ir(int imm, RegisterID dst) argument 1112 cmpw_im(int imm, int offset, RegisterID base, RegisterID index, int scale) argument 1130 testl_i32r(int imm, RegisterID dst) argument 1139 testl_i32m(int imm, int offset, RegisterID base) argument 1150 testb_im(int imm, int offset, RegisterID base) argument 1156 testb_im(int imm, int offset, RegisterID base, RegisterID index, int scale) argument 1163 testb_im(int imm, const void* addr) argument 1170 testl_i32m(int imm, int offset, RegisterID base, RegisterID index, int scale) argument 1187 testq_i32r(int imm, RegisterID dst) argument 1196 testq_i32m(int imm, int offset, RegisterID base) argument 1202 testq_i32m(int imm, int offset, RegisterID base, RegisterID index, int scale) argument 1215 testb_i8r(int imm, RegisterID dst) argument 1333 movl_i32r(int imm, RegisterID dst) argument 1339 movl_i32m(int imm, int offset, RegisterID base) argument 1345 movl_i32m(int imm, int offset, RegisterID base, RegisterID index, int scale) argument 1352 movb_i8m(int imm, const void* addr) argument 1360 movb_i8m(int imm, int offset, RegisterID base) argument 1367 movb_i8m(int imm, int offset, RegisterID base, RegisterID index, int scale) argument 1460 movq_i32m(int imm, int offset, RegisterID base) argument 1466 movq_i64r(int64_t imm, RegisterID dst) argument 1495 movl_i32m(int imm, const void* addr) argument 1890 psllq_i8r(int imm, XMMRegisterID dst) argument 1897 psrlq_i8r(int imm, XMMRegisterID dst) argument 2112 revertJumpTo_movq_i64r(void* instructionStart, int64_t imm, RegisterID dst) argument 2130 revertJumpTo_movl_i32r(void* instructionStart, int32_t imm, RegisterID dst) argument 2153 revertJumpTo_cmpl_ir_force32(void* instructionStart, int32_t imm, RegisterID dst) argument 2170 revertJumpTo_cmpl_im_force32(void* instructionStart, int32_t imm, int offset, RegisterID dst) argument 2621 immediate8(int imm) argument 2626 immediate16(int imm) argument 2631 immediate32(int imm) argument 2636 immediate64(int64_t imm) argument [all...] |
H A D | MacroAssemblerX86.h | 63 void add32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 65 m_assembler.leal_mr(imm.m_value, src, dest); 68 void add32(TrustedImm32 imm, AbsoluteAddress address) argument 70 m_assembler.addl_im(imm.m_value, address.m_ptr); 78 void add64(TrustedImm32 imm, AbsoluteAddress address) argument 80 m_assembler.addl_im(imm.m_value, address.m_ptr); 81 m_assembler.adcl_im(imm.m_value >> 31, reinterpret_cast<const char*>(address.m_ptr) + sizeof(int32_t)); 84 void and32(TrustedImm32 imm, AbsoluteAddress address) argument 86 m_assembler.andl_im(imm.m_value, address.m_ptr); 89 void or32(TrustedImm32 imm, AbsoluteAddres argument 99 sub32(TrustedImm32 imm, AbsoluteAddress address) argument 150 store32(TrustedImm32 imm, void* address) argument 165 store8(TrustedImm32 imm, void* address) argument 189 branchAdd32(ResultCondition cond, TrustedImm32 imm, AbsoluteAddress dest) argument 195 branchSub32(ResultCondition cond, TrustedImm32 imm, AbsoluteAddress dest) argument [all...] |
H A D | MacroAssemblerX86Common.h | 115 void add32(TrustedImm32 imm, Address address) argument 117 m_assembler.addl_im(imm.m_value, address.offset, address.base); 120 void add32(TrustedImm32 imm, RegisterID dest) argument 122 if (imm.m_value == 1) 125 m_assembler.addl_ir(imm.m_value, dest); 138 void add32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 140 m_assembler.leal_mr(imm.m_value, src, dest); 148 void and32(TrustedImm32 imm, RegisterID dest) argument 150 m_assembler.andl_ir(imm.m_value, dest); 163 void and32(TrustedImm32 imm, Addres argument 180 and32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 211 lshift32(TrustedImm32 imm, RegisterID dest) argument 216 lshift32(RegisterID src, TrustedImm32 imm, RegisterID dest) argument 233 mul32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 253 or32(TrustedImm32 imm, RegisterID dest) argument 268 or32(TrustedImm32 imm, Address address) argument 285 or32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 316 rshift32(TrustedImm32 imm, RegisterID dest) argument 321 rshift32(RegisterID src, TrustedImm32 imm, RegisterID dest) argument 353 urshift32(TrustedImm32 imm, RegisterID dest) argument 358 urshift32(RegisterID src, TrustedImm32 imm, RegisterID dest) argument 370 sub32(TrustedImm32 imm, RegisterID dest) argument 378 sub32(TrustedImm32 imm, Address address) argument 398 xor32(TrustedImm32 imm, Address dest) argument 406 xor32(TrustedImm32 imm, RegisterID dest) argument 436 xor32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 575 store32(TrustedImm32 imm, ImplicitAddress address) argument 580 store32(TrustedImm32 imm, BaseIndex address) argument 585 store8(TrustedImm32 imm, Address address) argument 591 store8(TrustedImm32 imm, BaseIndex address) argument 936 lshiftPacked(TrustedImm32 imm, XMMRegisterID reg) argument 942 rshiftPacked(TrustedImm32 imm, XMMRegisterID reg) argument 989 push(TrustedImm32 imm) argument 999 move(TrustedImm32 imm, RegisterID dest) argument 1018 move(TrustedImmPtr imm, RegisterID dest) argument 1023 move(TrustedImm64 imm, RegisterID dest) argument 1050 move(TrustedImmPtr imm, RegisterID dest) argument 1250 branchAdd32(ResultCondition cond, TrustedImm32 imm, RegisterID dest) argument 1282 branchAdd32(ResultCondition cond, RegisterID src, TrustedImm32 imm, RegisterID dest) argument 1304 branchMul32(ResultCondition cond, TrustedImm32 imm, RegisterID src, RegisterID dest) argument 1326 branchSub32(ResultCondition cond, TrustedImm32 imm, RegisterID dest) argument 1332 branchSub32(ResultCondition cond, TrustedImm32 imm, Address dest) argument [all...] |
H A D | ARMv7Assembler.h | 845 void adc(RegisterID rd, RegisterID rn, ARMThumbImmediate imm) argument 851 ASSERT(imm.isEncodedImm()); 853 m_formatter.twoWordOp5i6Imm4Reg4EncodedImm(OP_ADC_imm, rn, rd, imm); 856 void add(RegisterID rd, RegisterID rn, ARMThumbImmediate imm) argument 862 ASSERT(imm.isValid()); 864 if (rn == ARMRegisters::sp && imm.isUInt16()) { 865 ASSERT(!(imm.getUInt16() & 3)); 866 if (!(rd & 8) && imm.isUInt10()) { 867 m_formatter.oneWordOp5Reg3Imm8(OP_ADD_SP_imm_T1, rd, static_cast<uint8_t>(imm.getUInt10() >> 2)); 869 } else if ((rd == ARMRegisters::sp) && imm 919 add_S(RegisterID rd, RegisterID rn, ARMThumbImmediate imm) argument 959 ARM_and(RegisterID rd, RegisterID rn, ARMThumbImmediate imm) argument 1035 cmn(RegisterID rn, ARMThumbImmediate imm) argument 1043 cmp(RegisterID rn, ARMThumbImmediate imm) argument 1070 eor(RegisterID rd, RegisterID rn, ARMThumbImmediate imm) argument 1119 ldr(RegisterID rt, RegisterID rn, ARMThumbImmediate imm) argument 1138 ldrCompact(RegisterID rt, RegisterID rn, ARMThumbImmediate imm) argument 1193 ldrh(RegisterID rt, RegisterID rn, ARMThumbImmediate imm) argument 1250 ldrb(RegisterID rt, RegisterID rn, ARMThumbImmediate imm) argument 1352 movT3(RegisterID rd, ARMThumbImmediate imm) argument 1362 revertJumpTo_movT3movtcmpT2(void* instructionStart, RegisterID left, RegisterID right, uintptr_t imm) argument 1375 revertJumpTo_movT3(void* instructionStart, RegisterID rd, ARMThumbImmediate imm) argument 1388 mov(RegisterID rd, ARMThumbImmediate imm) argument 1406 movt(RegisterID rd, ARMThumbImmediate imm) argument 1413 mvn(RegisterID rd, ARMThumbImmediate imm) argument 1442 orr(RegisterID rd, RegisterID rn, ARMThumbImmediate imm) argument 1563 str(RegisterID rt, RegisterID rn, ARMThumbImmediate imm) argument 1624 strb(RegisterID rt, RegisterID rn, ARMThumbImmediate imm) argument 1683 strh(RegisterID rt, RegisterID rn, ARMThumbImmediate imm) argument 1741 sub(RegisterID rd, RegisterID rn, ARMThumbImmediate imm) argument 1771 sub(RegisterID rd, ARMThumbImmediate imm, RegisterID rn) argument 1803 sub_S(RegisterID rd, RegisterID rn, ARMThumbImmediate imm) argument 1828 sub_S(RegisterID rd, ARMThumbImmediate imm, RegisterID rn) argument 1857 tst(RegisterID rn, ARMThumbImmediate imm) argument 1936 vldr(FPDoubleRegisterID rd, RegisterID rn, int32_t imm) argument 1941 flds(FPSingleRegisterID rd, RegisterID rn, int32_t imm) argument 1988 vstr(FPDoubleRegisterID rd, RegisterID rn, int32_t imm) argument 1993 fsts(FPSingleRegisterID rd, RegisterID rn, int32_t imm) argument 2520 setUInt7ForLoad(void* code, ARMThumbImmediate imm) argument 2752 twoWordOp5i6Imm4Reg4EncodedImmFirst(uint16_t op, ARMThumbImmediate imm) argument 2763 twoWordOp5i6Imm4Reg4EncodedImmSecond(uint16_t rd, ARMThumbImmediate imm) argument 2776 oneWordOp5Reg3Imm8(OpcodeID op, RegisterID rd, uint8_t imm) argument 2781 oneWordOp5Imm5Reg3Reg3(OpcodeID op, uint8_t imm, RegisterID reg1, RegisterID reg2) argument 2791 oneWordOp7Imm9(OpcodeID op, uint16_t imm) argument 2796 oneWordOp8Imm8(OpcodeID op, uint8_t imm) argument 2806 oneWordOp9Imm7(OpcodeID op, uint8_t imm) argument 2834 twoWordOp16Imm16(OpcodeID1 op1, uint16_t imm) argument 2840 twoWordOp5i6Imm4Reg4EncodedImm(OpcodeID1 op, int imm4, RegisterID rd, ARMThumbImmediate imm) argument 2849 twoWordOp12Reg4Reg4Imm12(OpcodeID1 op, RegisterID reg1, RegisterID reg2, uint16_t imm) argument 2875 vfpMemOp(OpcodeID1 op1, OpcodeID2 op2, bool size, RegisterID rn, VFPOperand rd, int32_t imm) argument [all...] |
H A D | MacroAssemblerARMv7.h | 158 void add32(TrustedImm32 imm, RegisterID dest) argument 160 add32(imm, dest, dest); 169 void add32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 171 ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12OrEncodedImm(imm.m_value); 183 move(imm, dataTempRegister); 188 void add32(TrustedImm32 imm, Address address) argument 192 ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12OrEncodedImm(imm.m_value); 198 move(imm, addressTempRegister); 211 void add32(TrustedImm32 imm, AbsoluteAddress address) argument 215 ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12OrEncodedImm(imm 228 addPtrNoFlags(TrustedImm32 imm, RegisterID srcDest) argument 233 add64(TrustedImm32 imm, AbsoluteAddress address) argument 258 and32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 274 and32(TrustedImm32 imm, RegisterID dest) argument 300 lshift32(RegisterID src, TrustedImm32 imm, RegisterID dest) argument 310 lshift32(TrustedImm32 imm, RegisterID dest) argument 320 mul32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 344 or32(TrustedImm32 imm, Address address) argument 351 or32(TrustedImm32 imm, RegisterID dest) argument 361 or32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 382 rshift32(RegisterID src, TrustedImm32 imm, RegisterID dest) argument 392 rshift32(TrustedImm32 imm, RegisterID dest) argument 407 urshift32(RegisterID src, TrustedImm32 imm, RegisterID dest) argument 417 urshift32(TrustedImm32 imm, RegisterID dest) argument 427 sub32(TrustedImm32 imm, RegisterID dest) argument 438 sub32(TrustedImm32 imm, Address address) argument 461 sub32(TrustedImm32 imm, AbsoluteAddress address) argument 483 xor32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 504 xor32(TrustedImm32 imm, RegisterID dest) argument 755 store32(TrustedImm32 imm, ImplicitAddress address) argument 761 store32(TrustedImm32 imm, BaseIndex address) argument 773 store32(TrustedImm32 imm, const void* address) argument 795 store8(TrustedImm32 imm, void* address) argument 801 store8(TrustedImm32 imm, Address address) argument 1197 push(TrustedImm32 imm) argument 1217 move(TrustedImm32 imm, RegisterID dest) argument 1240 move(TrustedImmPtr imm, RegisterID dest) argument 1310 int32_t imm = right.m_value; local 1324 int32_t imm = mask.m_value; local 1536 branchAdd32(ResultCondition cond, RegisterID op1, TrustedImm32 imm, RegisterID dest) argument 1559 branchAdd32(ResultCondition cond, TrustedImm32 imm, RegisterID dest) argument 1564 branchAdd32(ResultCondition cond, TrustedImm32 imm, AbsoluteAddress dest) argument 1607 branchMul32(ResultCondition cond, TrustedImm32 imm, RegisterID src, RegisterID dest) argument 1632 branchSub32(ResultCondition cond, RegisterID op1, TrustedImm32 imm, RegisterID dest) argument 1649 branchSub32(ResultCondition cond, TrustedImm32 imm, RegisterID dest) argument 1752 moveWithPatch(TrustedImm32 imm, RegisterID dst) argument 1759 moveWithPatch(TrustedImmPtr imm, RegisterID dst) argument 1802 patchableBranch32(RelationalCondition cond, RegisterID reg, TrustedImm32 imm) argument 1952 ARMThumbImmediate imm = ARMThumbImmediate::makeUInt12OrEncodedImm(address.offset); local 1999 moveFixedWidthEncoding(TrustedImm32 imm, RegisterID dst) argument [all...] |
H A D | MacroAssemblerMIPS.h | 124 void add32(TrustedImm32 imm, RegisterID dest) argument 126 add32(imm, dest, dest); 129 void add32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 131 if (imm.m_value >= -32768 && imm.m_value <= 32767 134 addiu dest, src, imm 136 m_assembler.addiu(dest, src, imm.m_value); 139 li immTemp, imm 142 move(imm, immTempRegister); 147 void add32(RegisterID src, TrustedImm32 imm, RegisterI argument 152 add32(TrustedImm32 imm, Address address) argument 233 add32(TrustedImm32 imm, AbsoluteAddress address) argument 253 add64(TrustedImm32 imm, AbsoluteAddress address) argument 288 and32(TrustedImm32 imm, RegisterID dest) argument 304 and32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 326 lshift32(TrustedImm32 imm, RegisterID dest) argument 332 lshift32(RegisterID src, TrustedImm32 imm, RegisterID dest) argument 348 mul32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 379 or32(TrustedImm32 imm, RegisterID dest) argument 398 or32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 433 rshift32(TrustedImm32 imm, RegisterID dest) argument 438 rshift32(RegisterID src, TrustedImm32 imm, RegisterID dest) argument 453 urshift32(TrustedImm32 imm, RegisterID dest) argument 458 urshift32(RegisterID src, TrustedImm32 imm, RegisterID dest) argument 473 sub32(TrustedImm32 imm, RegisterID dest) argument 491 sub32(RegisterID src, TrustedImm32 imm, RegisterID dest) argument 509 sub32(TrustedImm32 imm, Address address) argument 557 sub32(TrustedImm32 imm, AbsoluteAddress address) argument 588 xor32(TrustedImm32 imm, RegisterID dest) argument 603 xor32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 1001 store8(TrustedImm32 imm, void* address) argument 1091 store32(TrustedImm32 imm, ImplicitAddress address) argument 1118 store32(TrustedImm32 imm, BaseIndex address) argument 1166 store32(TrustedImm32 imm, const void* address) argument 1239 push(TrustedImm32 imm) argument 1249 move(TrustedImm32 imm, RegisterID dest) argument 1266 move(TrustedImmPtr imm, RegisterID dest) argument 1654 branchAdd32(ResultCondition cond, TrustedImm32 imm, RegisterID dest) argument 1660 branchAdd32(ResultCondition cond, RegisterID src, TrustedImm32 imm, RegisterID dest) argument 1667 branchAdd32(ResultCondition cond, TrustedImm32 imm, AbsoluteAddress dest) argument 1822 branchMul32(ResultCondition cond, TrustedImm32 imm, RegisterID src, RegisterID dest) argument 1875 branchSub32(ResultCondition cond, TrustedImm32 imm, RegisterID dest) argument 1881 branchSub32(ResultCondition cond, RegisterID src, TrustedImm32 imm, RegisterID dest) argument 2086 moveWithPatch(TrustedImm32 imm, RegisterID dest) argument [all...] |
H A D | MacroAssemblerARM.h | 99 void add32(TrustedImm32 imm, Address address) argument 102 add32(imm, ARMRegisters::S1); 106 void add32(TrustedImm32 imm, RegisterID dest) argument 108 m_assembler.adds(dest, dest, m_assembler.getImm(imm.m_value, ARMRegisters::S0)); 124 void add32(RegisterID src, TrustedImm32 imm, RegisterID dest) argument 126 m_assembler.adds(dest, src, m_assembler.getImm(imm.m_value, ARMRegisters::S0)); 139 void and32(TrustedImm32 imm, RegisterID dest) argument 141 ARMWord w = m_assembler.getImm(imm.m_value, ARMRegisters::S0, true); 148 void and32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 150 ARMWord w = m_assembler.getImm(imm 176 lshift32(TrustedImm32 imm, RegisterID dest) argument 181 lshift32(RegisterID src, TrustedImm32 imm, RegisterID dest) argument 207 mul32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 231 or32(TrustedImm32 imm, RegisterID dest) argument 236 or32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 259 rshift32(TrustedImm32 imm, RegisterID dest) argument 264 rshift32(RegisterID src, TrustedImm32 imm, RegisterID dest) argument 282 urshift32(TrustedImm32 imm, RegisterID dest) argument 287 urshift32(RegisterID src, TrustedImm32 imm, RegisterID dest) argument 297 sub32(TrustedImm32 imm, RegisterID dest) argument 302 sub32(TrustedImm32 imm, Address address) argument 315 sub32(RegisterID src, TrustedImm32 imm, RegisterID dest) argument 330 xor32(TrustedImm32 imm, RegisterID dest) argument 338 xor32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 485 store8(TrustedImm32 imm, ImplicitAddress address) argument 491 store8(TrustedImm32 imm, const void* address) argument 513 store32(TrustedImm32 imm, ImplicitAddress address) argument 519 store32(TrustedImm32 imm, BaseIndex address) argument 531 store32(TrustedImm32 imm, const void* address) argument 560 push(TrustedImm32 imm) argument 572 move(TrustedImm32 imm, RegisterID dest) argument 583 move(TrustedImmPtr imm, RegisterID dest) argument 765 branchAdd32(ResultCondition cond, TrustedImm32 imm, RegisterID dest) argument 773 branchAdd32(ResultCondition cond, RegisterID src, TrustedImm32 imm, RegisterID dest) argument 781 branchAdd32(ResultCondition cond, TrustedImm32 imm, AbsoluteAddress dest) argument 828 branchMul32(ResultCondition cond, TrustedImm32 imm, RegisterID src, RegisterID dest) argument 848 branchSub32(ResultCondition cond, TrustedImm32 imm, RegisterID dest) argument 855 branchSub32(ResultCondition cond, RegisterID src, TrustedImm32 imm, RegisterID dest) argument 888 patchableBranch32(RelationalCondition cond, RegisterID reg, TrustedImm32 imm) argument 964 add32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 969 add32(TrustedImm32 imm, AbsoluteAddress address) argument 976 add64(TrustedImm32 imm, AbsoluteAddress address) argument 1001 sub32(TrustedImm32 imm, AbsoluteAddress address) argument [all...] |
H A D | MacroAssemblerSH4.h | 150 void add32(TrustedImm32 imm, RegisterID dest) argument 152 if (!imm.m_value) 155 if (m_assembler.isImmediate(imm.m_value)) { 156 m_assembler.addlImm8r(imm.m_value, dest); 161 m_assembler.loadConstant(imm.m_value, scr); 166 void add32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 169 add32(imm, dest); 172 void add32(TrustedImm32 imm, Address address) argument 174 if (!imm.m_value) 179 add32(imm, sc 223 and32(TrustedImm32 imm, RegisterID dest) argument 241 and32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 267 lshift32(TrustedImm32 imm, RegisterID dest) argument 301 mul32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 319 or32(TrustedImm32 imm, RegisterID dest) argument 344 or32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 367 xor32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument 394 rshift32(TrustedImm32 imm, RegisterID dest) argument 411 rshift32(RegisterID src, TrustedImm32 imm, RegisterID dest) argument 422 sub32(TrustedImm32 imm, AbsoluteAddress address) argument 445 sub32(TrustedImm32 imm, Address address) argument 450 add32(TrustedImm32 imm, AbsoluteAddress address) argument 473 add64(TrustedImm32 imm, AbsoluteAddress address) argument 499 sub32(TrustedImm32 imm, RegisterID dest) argument 538 xor32(TrustedImm32 imm, RegisterID srcDest) argument 556 compare32(int imm, RegisterID dst, RelationalCondition cond) argument 598 testImm(int imm, int offset, RegisterID base) argument 611 testlImm(int imm, RegisterID dst) argument 650 compare32(int imm, int offset, RegisterID base, RelationalCondition cond) argument 922 store8(TrustedImm32 imm, void* address) argument 980 store32(TrustedImm32 imm, ImplicitAddress address) argument 1000 store32(TrustedImm32 imm, void* address) argument 1019 store32(TrustedImm32 imm, BaseIndex address) argument 1713 push(TrustedImm32 imm) argument 1723 move(TrustedImm32 imm, RegisterID dest) argument 1742 move(TrustedImmPtr imm, RegisterID dest) argument 2080 branchAdd32(ResultCondition cond, TrustedImm32 imm, RegisterID dest) argument 2091 branchAdd32(ResultCondition cond, RegisterID src, TrustedImm32 imm, RegisterID dest) argument 2114 branchAdd32(ResultCondition cond, TrustedImm32 imm, AbsoluteAddress dest) argument 2203 branchMul32(ResultCondition cond, TrustedImm32 imm, RegisterID src, RegisterID dest) argument 2236 branchSub32(ResultCondition cond, TrustedImm32 imm, RegisterID dest) argument 2247 branchSub32(ResultCondition cond, RegisterID src, TrustedImm32 imm, RegisterID dest) argument 2334 urshift32(TrustedImm32 imm, RegisterID dest) argument [all...] |
H A D | MIPSAssembler.h | 225 void li(RegisterID dest, int imm) argument 227 if (imm >= -32768 && imm <= 32767) 228 addiu(dest, MIPSRegisters::zero, imm); 229 else if (imm >= 0 && imm < 65536) 230 ori(dest, MIPSRegisters::zero, imm); 232 lui(dest, imm >> 16); 233 if (imm & 0xffff) 234 ori(dest, dest, imm); 238 lui(RegisterID rt, int imm) argument 243 addiu(RegisterID rt, RegisterID rs, int imm) argument 293 andi(RegisterID rt, RegisterID rs, int imm) argument 308 ori(RegisterID rt, RegisterID rs, int imm) argument 318 xori(RegisterID rt, RegisterID rs, int imm) argument 333 sltiu(RegisterID rt, RegisterID rs, int imm) argument 446 bgez(RegisterID rs, int imm) argument 451 bltz(RegisterID rs, int imm) argument 456 beq(RegisterID rs, RegisterID rt, int imm) argument 461 bne(RegisterID rs, RegisterID rt, int imm) argument 882 revertJumpToMove(void* instructionStart, RegisterID rt, int imm) argument [all...] |
H A D | ARMAssembler.h | 540 void ldrImmediate(int rd, ARMWord imm, Condition cc = AL) argument 542 m_buffer.putIntWithConstantInt(toARMWord(cc) | LoadUint32 | DataTransferUp | RN(ARMRegisters::pc) | RD(rd), imm, true); local 545 void ldrUniqueImmediate(int rd, ARMWord imm, Condition cc = AL) argument 547 m_buffer.putIntWithConstantInt(toARMWord(cc) | LoadUint32 | DataTransferUp | RN(ARMRegisters::pc) | RD(rd), imm); local 849 // Must be an ldr ..., [pc +/- imm] 860 // Must be an ldr ..., [pc +/- imm] 1008 static void revertBranchPtrWithPatch(void* instructionStart, RegisterID rn, ARMWord imm) argument 1014 *getLdrImmAddress(instruction) = imm; 1040 static ARMWord getOp2(ARMWord imm); 1042 // Fast case if imm i 1043 getOp2Byte(ARMWord imm) argument 1049 getOp2Half(ARMWord imm) argument 1056 getImm16Op2(ARMWord imm) argument [all...] |
/macosx-10.10/cxxfilt-11/cxxfilt/opcodes/ |
H A D | sh64-dis.c | 186 long imm = 0; local 312 imm = temp & 0x3f; 313 if (imm & (unsigned long) 0x20) 314 imm |= ~(unsigned long) 0x3f; 315 fprintf_fn (stream, "%ld", imm); 320 imm = temp & 0x3f; 321 if (imm & (unsigned long) 0x20) 322 imm |= ~(unsigned long) 0x3f; 323 fprintf_fn (stream, "%ld", imm * 32); 344 imm [all...] |
H A D | sh-dis.c | 498 int imm = 0; local 527 imm = (nibs[2] << 4) | (nibs[3]); 528 if (imm & 0x80) 529 imm |= ~0xff; 530 imm = ((char) imm) * 2 + 4; 533 imm = ((nibs[1]) << 8) | (nibs[2] << 4) | (nibs[3]); 534 if (imm & 0x800) 535 imm |= ~0xfff; 536 imm [all...] |
H A D | h8500-dis.c | 99 int imm = 0; local 169 imm = (buffer[byte] << 8) | (buffer[byte + 1]); 172 imm = (buffer[byte]) & 0xf; 176 imm = (buffer[byte]); 275 func (stream, "#0x%0x:16", imm & 0xffff); 285 if (imm & (1 << i)) 297 func (stream, "#0x%0x:8", imm & 0xff); 311 func (stream, "#%d:4", imm);
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H A D | or32-opc.c | 852 extend_imm (unsigned long imm, char l) argument 861 imm &= mask; 864 if (letter_signed(l) && (imm >> (letter_bits - 1))) 865 imm |= (~mask); 867 return imm; 962 int imm = or32_extract (param_ch, encoding, insn); local 964 imm = extend_imm (imm, param_ch); 968 if (imm < 0) 969 sprintf (disassembled, "%s%d", disassembled, imm); [all...] |
H A D | sparc-dis.c | 668 int imm; local 671 imm = X_SIMM (insn, 13); 673 imm = X_SIMM (insn, 11); 675 imm = X_SIMM (insn, 10); 687 if (imm <= 9) 688 (*info->fprintf_func) (stream, "%d", imm); 690 (*info->fprintf_func) (stream, "%#x", imm); 697 int imm = X_IMM (insn, *s == 'X' ? 5 : 6); local 699 if (imm <= 9) 700 (info->fprintf_func) (stream, "%d", imm); [all...] |
H A D | arm-dis.c | 1739 int imm; 1741 imm = (given & 0xf) | ((given & 0xe0) >> 1); 1743 /* Is ``imm'' a negative number? */ 1744 if (imm & 0x40) 1745 imm |= (-1 << 7); 1747 func (stream, "%d", imm); 2942 int imm; 2944 imm = (given & 0xf) | ((given & 0xfff00) >> 4); 2945 func (stream, "%d", imm); 3136 long imm 1738 int imm; local 2941 int imm; local 3135 long imm = (given & 0x07c0) >> 6; local 3325 unsigned int bits = 0, imm, imm8, mod; local 3348 unsigned int imm = 0; local 3359 unsigned int imm = 0; local 3371 unsigned int imm = 0; local [all...] |
H A D | or32-dis.c | 221 int imm = or32_extract(param_ch, encoding, insn); local 224 (*info->fprintf_func) (info->stream, "0x%x", imm); local 225 /* (*info->fprintf_func) (info->stream, "%d", imm); */ 227 (*info->fprintf_func) (info->stream, "0x%x", imm); local
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/macosx-10.10/llvmCore-3425.0.34/lib/Target/MBlaze/ |
H A D | MBlazeISelDAGToDAG.cpp | 119 /// can be more efficiently represented with [r+imm]. 127 int32_t imm = 0; 129 if (isIntS32Immediate(N.getOperand(1), imm)) 145 /// a signed 32-bit displacement [r+imm], and if it is not better 154 int32_t imm = 0; local 155 if (isIntS32Immediate(N.getOperand(1), imm)) { 156 Disp = CurDAG->getTargetConstant(imm, MVT::i32); 209 SDValue imm = CurDAG->getTargetConstant(0, MVT::i32); local 215 return CurDAG->SelectNodeTo(Node, Opc, VT, TFI, imm); 216 return CurDAG->getMachineNode(Opc, dl, VT, TFI, imm); [all...] |
/macosx-10.10/JavaScriptCore-7600.1.17/disassembler/udis86/ |
H A D | udis86_syn-att.c | 104 int64_t imm = 0; local 109 case 8: imm = op->lval.sbyte; break; 110 case 16: imm = op->lval.sword; break; 111 case 32: imm = op->lval.sdword; break; 112 case 64: imm = op->lval.sqword; break; 122 mkasm( u, "$0x" FMT64 "x", (uint64_t)(imm & sext_mask) );
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H A D | udis86_syn-intel.c | 116 int64_t imm = 0; local 123 case 8: imm = op->lval.sbyte; break; 124 case 16: imm = op->lval.sword; break; 125 case 32: imm = op->lval.sdword; break; 126 case 64: imm = op->lval.sqword; break; 136 mkasm( u, "0x" FMT64 "x", (uint64_t)(imm & sext_mask) );
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/macosx-10.10/llvmCore-3425.0.34/lib/Target/ARM/Disassembler/ |
H A D | ARMDisassembler.cpp | 1122 uint32_t imm = Val & 0xFF; local 1124 uint32_t rot_imm = (imm >> rot) | (imm << ((32-rot) & 0x1F)); 1135 unsigned imm = fieldFromInstruction(Val, 7, 5); local 1157 if (Shift == ARM_AM::ror && imm == 0) 1160 unsigned Op = Shift | (imm << 3); 1300 unsigned imm = fieldFromInstruction(Insn, 0, 8); local 1382 imm = ARM_AM::getAM5Opc(U ? ARM_AM::add : ARM_AM::sub, imm); 1383 Inst.addOperand(MCOperand::CreateImm(imm)); 1445 unsigned imm = fieldFromInstruction(Insn, 0, 12); local 1528 unsigned imm = ARM_AM::getAM2Opc(Op, amt, Opc, idx_mode); local 1550 unsigned imm = fieldFromInstruction(Val, 7, 5); local 1595 unsigned imm = fieldFromInstruction(Insn, 8, 4); local 1977 unsigned imm = 0; local 2002 unsigned imm = 0; local 2055 unsigned imm = fieldFromInstruction(Val, 0, 12); local 2076 unsigned imm = fieldFromInstruction(Val, 0, 8); local 2127 unsigned imm = fieldFromInstruction(Insn, 0, 24) << 2; local 2901 unsigned imm = fieldFromInstruction(Insn, 0, 4); local 3024 unsigned imm = fieldFromInstruction(Insn, 0, 8); local 3087 unsigned imm = fieldFromInstruction(Val, 3, 5); local 3098 unsigned imm = Val << 2; local 3120 unsigned imm = fieldFromInstruction(Val, 0, 2); local 3170 int imm = fieldFromInstruction(Insn, 0, 12); local 3191 int imm = Val & 0xFF; local 3205 unsigned imm = fieldFromInstruction(Val, 0, 9); local 3220 unsigned imm = fieldFromInstruction(Val, 0, 8); local 3232 int imm = Val & 0xFF; local 3248 unsigned imm = fieldFromInstruction(Val, 0, 9); local 3309 unsigned imm = fieldFromInstruction(Val, 0, 12); local 3321 unsigned imm = fieldFromInstruction(Insn, 0, 7); local 3450 unsigned imm = fieldFromInstruction(Insn, 0, 4); local 3476 unsigned imm = fieldFromInstruction(Val, 0, 8); local 3495 unsigned imm = (unrot >> rot) | (unrot << ((32-rot)&31)); local 3606 unsigned imm = fieldFromInstruction(Insn, 0, 12); local 3631 unsigned imm = fieldFromInstruction(Insn, 0, 12); local 3659 unsigned imm = fieldFromInstruction(Insn, 0, 12); local 3684 unsigned imm = fieldFromInstruction(Insn, 0, 12); local 4458 unsigned imm = fieldFromInstruction(Insn, 16, 6); local 4486 unsigned imm = fieldFromInstruction(Insn, 16, 6); local [all...] |