Lines Matching refs:imm
540 void ldrImmediate(int rd, ARMWord imm, Condition cc = AL)
542 m_buffer.putIntWithConstantInt(toARMWord(cc) | LoadUint32 | DataTransferUp | RN(ARMRegisters::pc) | RD(rd), imm, true);
545 void ldrUniqueImmediate(int rd, ARMWord imm, Condition cc = AL)
547 m_buffer.putIntWithConstantInt(toARMWord(cc) | LoadUint32 | DataTransferUp | RN(ARMRegisters::pc) | RD(rd), imm);
849 // Must be an ldr ..., [pc +/- imm]
860 // Must be an ldr ..., [pc +/- imm]
1008 static void revertBranchPtrWithPatch(void* instructionStart, RegisterID rn, ARMWord imm)
1014 *getLdrImmAddress(instruction) = imm;
1040 static ARMWord getOp2(ARMWord imm);
1042 // Fast case if imm is known to be between 0 and 0xff
1043 static ARMWord getOp2Byte(ARMWord imm)
1045 ASSERT(imm <= 0xff);
1046 return Op2Immediate | imm;
1049 static ARMWord getOp2Half(ARMWord imm)
1051 ASSERT(imm <= 0xff);
1052 return ImmediateForHalfWordTransfer | (imm & 0x0f) | ((imm & 0xf0) << 4);
1056 static ARMWord getImm16Op2(ARMWord imm)
1058 if (imm <= 0xffff)
1059 return (imm & 0xf000) << 4 | (imm & 0xfff);
1063 ARMWord getImm(ARMWord imm, int tmpReg, bool invert = false);
1064 void moveImm(ARMWord imm, int dest);
1065 ARMWord encodeComplexImm(ARMWord imm, int dest);
1169 int genInt(int reg, ARMWord imm, bool positive);