Searched refs:BasePtr (Results 1 - 17 of 17) sorted by relevance

/macosx-10.10/llvmCore-3425.0.34/lib/Target/X86/
H A DX86RegisterInfo.h53 /// BasePtr - X86 physical register used as a base ptr in complex stack
56 unsigned BasePtr; member in class:llvm::X86RegisterInfo
133 unsigned getBaseRegister() const { return BasePtr; }
H A DX86RegisterInfo.cpp83 BasePtr = Is64Bit ? X86::RBX : X86::ESI;
414 return MRI->canReserveReg(BasePtr);
560 unsigned BasePtr;
565 BasePtr = (FrameIndex < 0 ? FramePtr : getBaseRegister());
567 BasePtr = (FrameIndex < 0 ? FramePtr : StackPtr);
569 BasePtr = StackPtr;
571 BasePtr = (TFI->hasFP(MF) ? FramePtr : StackPtr);
575 MI.getOperand(i).ChangeToRegister(BasePtr, false);
H A DX86FrameLowering.cpp653 unsigned BasePtr = RegInfo->getBaseRegister();
936 BuildMI(MBB, MBBI, DL, TII.get(Opc), BasePtr)
1352 // Spill the BasePtr if it's used.
/macosx-10.10/llvmCore-3425.0.34/lib/CodeGen/
H A DShadowStackGC.cpp67 IRBuilder<> &B, Value *BasePtr,
70 IRBuilder<> &B, Value *BasePtr,
349 ShadowStackGC::CreateGEP(LLVMContext &Context, IRBuilder<> &B, Value *BasePtr, argument
354 Value* Val = B.CreateGEP(BasePtr, Indices, Name);
362 ShadowStackGC::CreateGEP(LLVMContext &Context, IRBuilder<> &B, Value *BasePtr, argument
366 Value *Val = B.CreateGEP(BasePtr, Indices, Name);
/macosx-10.10/llvmCore-3425.0.34/lib/Target/ARM/
H A DARMBaseRegisterInfo.h83 /// BasePtr - ARM physical register used as a base ptr in complex stack
86 unsigned BasePtr; member in class:llvm::ARMBaseRegisterInfo
152 unsigned getBaseRegister() const { return BasePtr; }
H A DThumb1FrameLowering.cpp61 unsigned BasePtr = RegInfo->getBaseRegister(); local
167 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), BasePtr)
H A DARMBaseRegisterInfo.cpp60 BasePtr(ARM::R6) {
99 Reserved.set(BasePtr);
556 return MRI->canReserveReg(BasePtr);
H A DThumb1RegisterInfo.cpp630 FrameReg = BasePtr;
H A DARMISelLowering.cpp7899 SDValue BasePtr = LD->getBasePtr(); local
7900 SDValue NewLD1 = DAG.getLoad(MVT::i32, DL, LD->getChain(), BasePtr,
7905 SDValue OffsetPtr = DAG.getNode(ISD::ADD, DL, MVT::i32, BasePtr,
8011 SDValue BasePtr = St->getBasePtr(); local
8019 SDValue Ch = DAG.getStore(St->getChain(), DL, SubVec, BasePtr,
8022 BasePtr = DAG.getNode(ISD::ADD, DL, BasePtr.getValueType(), BasePtr,
8039 SDValue BasePtr = St->getBasePtr(); local
8041 StVal.getNode()->getOperand(0), BasePtr,
[all...]
/macosx-10.10/llvmCore-3425.0.34/lib/Target/MSP430/
H A DMSP430RegisterInfo.cpp182 unsigned BasePtr = (TFI->hasFP(MF) ? MSP430::FPW : MSP430::SPW);
202 MI.getOperand(i).ChangeToRegister(BasePtr, false);
219 MI.getOperand(i).ChangeToRegister(BasePtr, false);
/macosx-10.10/llvmCore-3425.0.34/lib/Transforms/Scalar/
H A DLoopIdiomRecognize.cpp490 Value *BasePtr = local
495 if (mayLoopAccessLocation(BasePtr, AliasAnalysis::ModRef,
500 deleteIfDeadInstruction(BasePtr, *SE, TLI);
522 NewCall = Builder.CreateMemSet(BasePtr, SplatValue,NumBytes,StoreAlignment);
539 NewCall = Builder.CreateCall3(MSP, BasePtr, PatternPtr, NumBytes);
H A DSROA.cpp1388 /// This will return the BasePtr if that is valid, or build a new GEP
1390 static Value *buildGEP(IRBuilder<> &IRB, Value *BasePtr, argument
1394 return BasePtr;
1399 return BasePtr;
1401 return IRB.CreateInBoundsGEP(BasePtr, Indices, Prefix + ".idx");
1404 /// \brief Get a natural GEP off of the BasePtr walking through Ty toward
1414 Value *BasePtr, Type *Ty, Type *TargetTy,
1418 return buildGEP(IRB, BasePtr, Indices, Prefix);
1441 return buildGEP(IRB, BasePtr, Indices, Prefix);
1413 getNaturalGEPWithType(IRBuilder< &IRB, const TargetData &TD, Value *BasePtr, Type *Ty, Type *TargetTy, SmallVectorImpl<Value *> &Indices, const Twine &Prefix) argument
/macosx-10.10/llvmCore-3425.0.34/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorTypes.cpp2372 SDValue BasePtr = LD->getBasePtr(); local
2385 SDValue LdOp = DAG.getLoad(NewVT, dl, Chain, BasePtr, LD->getPointerInfo(),
2421 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2429 L = DAG.getLoad(NewVT, dl, Chain, BasePtr,
2445 L = DAG.getLoad(NewVT, dl, Chain, BasePtr,
2523 SDValue BasePtr = LD->getBasePtr(); local
2536 Ops[0] = DAG.getExtLoad(ExtType, dl, EltVT, Chain, BasePtr,
2542 SDValue NewBasePtr = DAG.getNode(ISD::ADD, dl, BasePtr
2565 SDValue BasePtr = ST->getBasePtr(); local
2633 SDValue BasePtr = ST->getBasePtr(); local
[all...]
H A DDAGCombiner.cpp6781 SDValue BasePtr;
6784 if (!TLI.getPreIndexedAddressParts(N, BasePtr, Offset, AM, DAG))
6801 if (isa<FrameIndexSDNode>(BasePtr) || isa<RegisterSDNode>(BasePtr))
6807 if (Val == BasePtr || BasePtr.getNode()->isPredecessorOf(Val.getNode()))
6838 BasePtr, Offset, AM);
6841 BasePtr, Offset, AM);
6911 SDValue BasePtr; local
6914 if (TLI.getPostIndexedAddressParts(N, Op, BasePtr, Offse
[all...]
/macosx-10.10/llvmCore-3425.0.34/lib/Target/XCore/
H A DXCoreISelLowering.cpp415 SDValue BasePtr = LD->getBasePtr(); local
421 IsWordAlignedBasePlusConstantOffset(BasePtr, Base, Offset)) {
426 return DAG.getLoad(getPointerTy(), DL, Chain, BasePtr,
461 BasePtr, LD->getPointerInfo(), MVT::i16,
463 SDValue HighAddr = DAG.getNode(ISD::ADD, DL, MVT::i32, BasePtr,
479 // Lower to a call to __misaligned_load(BasePtr).
485 Entry.Node = BasePtr;
517 SDValue BasePtr = ST->getBasePtr(); local
525 SDValue StoreLow = DAG.getTruncStore(Chain, dl, Low, BasePtr,
529 SDValue HighAddr = DAG.getNode(ISD::ADD, dl, MVT::i32, BasePtr,
[all...]
/macosx-10.10/llvmCore-3425.0.34/lib/Analysis/
H A DConstantFolding.cpp689 APInt BasePtr(BitWidth, 0);
693 BasePtr = Base->getValue().zextOrTrunc(BitWidth);
694 if (Ptr->isNullValue() || BasePtr != 0) {
695 Constant *C = ConstantInt::get(Ptr->getContext(), Offset+BasePtr);
/macosx-10.10/llvmCore-3425.0.34/lib/Bitcode/Reader/
H A DBitcodeReader.cpp2064 Value *BasePtr; local
2065 if (getValueTypePair(Record, OpNum, NextValueNo, BasePtr))
2076 I = GetElementPtrInst::Create(BasePtr, GEPIdx);

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