Searched refs:test_ctl_hi1_val (Results 1 - 22 of 22) sorted by relevance

/linux-master/drivers/clk/qcom/
H A Dclk-alpha-pll.h135 u32 test_ctl_hi1_val; member in struct:alpha_pll_config
H A Dvideocc-sm8550.c46 .test_ctl_hi1_val = 0x00009000,
77 .test_ctl_hi1_val = 0x00009000,
H A Dgpucc-sm6115.c60 .test_ctl_hi1_val = 0x1,
116 .test_ctl_hi1_val = 0x1,
H A Dvideocc-sm8350.c56 .test_ctl_hi1_val = 0x01800000,
87 .test_ctl_hi1_val = 0x01800000,
H A Dgpucc-sm8550.c49 .test_ctl_hi1_val = 0x00009000,
80 .test_ctl_hi1_val = 0x00009000,
H A Dgpucc-sm8350.c48 .test_ctl_hi1_val = 0x01800000,
81 .test_ctl_hi1_val = 0x01800000,
H A Dgpucc-sc8280xp.c52 .test_ctl_hi1_val = 0x01800000,
81 .test_ctl_hi1_val = 0x01800000,
H A Dvideocc-sm8150.c37 .test_ctl_hi1_val = 0x00000020,
H A Dgpucc-sm8150.c41 .test_ctl_hi1_val = 0x00000020,
H A Dgpucc-sm8650.c52 .test_ctl_hi1_val = 0x00009000,
83 .test_ctl_hi1_val = 0x00009000,
H A Dcamcc-sm8550.c69 .test_ctl_hi1_val = 0x00009000,
146 .test_ctl_hi1_val = 0x00009000,
227 .test_ctl_hi1_val = 0x00009000,
281 .test_ctl_hi1_val = 0x00009000,
335 .test_ctl_hi1_val = 0x00009000,
389 .test_ctl_hi1_val = 0x00009000,
443 .test_ctl_hi1_val = 0x00009000,
497 .test_ctl_hi1_val = 0x00009000,
551 .test_ctl_hi1_val = 0x00009000,
605 .test_ctl_hi1_val
[all...]
H A Dcamcc-sc8280xp.c64 .test_ctl_hi1_val = 0x01800000,
139 .test_ctl_hi1_val = 0x01800000,
217 .test_ctl_hi1_val = 0x01800000,
270 .test_ctl_hi1_val = 0x01800000,
323 .test_ctl_hi1_val = 0x01800000,
376 .test_ctl_hi1_val = 0x01800000,
429 .test_ctl_hi1_val = 0x01800000,
H A Dcamcc-x1e80100.c62 .test_ctl_hi1_val = 0x00009000,
139 .test_ctl_hi1_val = 0x00009000,
220 .test_ctl_hi1_val = 0x00009000,
274 .test_ctl_hi1_val = 0x00009000,
328 .test_ctl_hi1_val = 0x00009000,
382 .test_ctl_hi1_val = 0x00009000,
H A Ddispcc-sm8250.c1348 disp_cc_pll0_config.test_ctl_hi1_val = 0x01800000;
1352 disp_cc_pll1_config.test_ctl_hi1_val = 0x01800000;
H A Dgpucc-x1e80100.c82 .test_ctl_hi1_val = 0x00009000,
H A Dclk-alpha-pll.c1604 config->test_ctl_hi1_val);
1981 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), config->test_ctl_hi1_val);
2145 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), config->test_ctl_hi1_val);
2173 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), config->test_ctl_hi1_val);
H A Ddispcc-x1e80100.c84 .test_ctl_hi1_val = 0x00009000,
115 .test_ctl_hi1_val = 0x00009000,
H A Ddispcc-sm8550.c86 .test_ctl_hi1_val = 0x00009000,
117 .test_ctl_hi1_val = 0x00009000,
H A Ddispcc-sm8650.c84 .test_ctl_hi1_val = 0x00009000,
115 .test_ctl_hi1_val = 0x00009000,
H A Dgcc-qcm2290.c119 .test_ctl_hi1_val = 0x1,
151 .test_ctl_hi1_val = 0x1,
312 .test_ctl_hi1_val = 0x1,
H A Ddispcc-sc8280xp.c80 .test_ctl_hi1_val = 0x01800000,
124 .test_ctl_hi1_val = 0x01800000,
207 .test_ctl_hi1_val = 0x01800000,
H A Dgcc-sm6115.c123 .test_ctl_hi1_val = 0x1,
176 .test_ctl_hi1_val = 0x1,
370 .test_ctl_hi1_val = 0x1,

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