Searched refs:control (Results 1 - 25 of 1221) sorted by relevance

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/linux-master/include/linux/greybus/
H A Dcontrol.h3 * Greybus CPort control protocol
33 int gb_control_enable(struct gb_control *control);
34 void gb_control_disable(struct gb_control *control);
35 int gb_control_suspend(struct gb_control *control);
36 int gb_control_resume(struct gb_control *control);
37 int gb_control_add(struct gb_control *control);
38 void gb_control_del(struct gb_control *control);
39 struct gb_control *gb_control_get(struct gb_control *control);
40 void gb_control_put(struct gb_control *control);
42 int gb_control_get_bundle_versions(struct gb_control *control);
[all...]
/linux-master/include/sound/
H A Dseq_midi_emul.h35 unsigned char control[128]; /* Current value of all controls */ member in struct:snd_midi_channel
73 void (*control)(void *private_data, int type, struct snd_midi_channel *chan); member in struct:snd_midi_op
94 #define gm_bank_select control[0]
95 #define gm_modulation control[1]
96 #define gm_breath control[2]
97 #define gm_foot_pedal control[4]
98 #define gm_portamento_time control[5]
99 #define gm_data_entry control[6]
100 #define gm_volume control[7]
101 #define gm_balance control[
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/linux-master/drivers/greybus/
H A Dcontrol.c3 * Greybus CPort control protocol.
14 /* Highest control-protocol version supported */
18 static int gb_control_get_version(struct gb_control *control) argument
20 struct gb_interface *intf = control->connection->intf;
28 ret = gb_operation_sync(control->connection,
34 "failed to get control-protocol version: %d\n",
41 "unsupported major control-protocol version (%u > %u)\n",
46 control->protocol_major = response.major;
47 control->protocol_minor = response.minor;
55 static int gb_control_get_bundle_version(struct gb_control *control, argument
85 gb_control_get_bundle_versions(struct gb_control *control) argument
131 gb_control_connected_operation(struct gb_control *control, u16 cport_id) argument
140 gb_control_disconnected_operation(struct gb_control *control, u16 cport_id) argument
150 gb_control_disconnecting_operation(struct gb_control *control, u16 cport_id) argument
178 gb_control_mode_switch_operation(struct gb_control *control) argument
215 gb_control_bundle_suspend(struct gb_control *control, u8 bundle_id) argument
240 gb_control_bundle_resume(struct gb_control *control, u8 bundle_id) argument
265 gb_control_bundle_deactivate(struct gb_control *control, u8 bundle_id) argument
291 gb_control_bundle_activate(struct gb_control *control, u8 bundle_id) argument
332 gb_control_interface_suspend_prepare(struct gb_control *control) argument
355 gb_control_interface_deactivate_prepare(struct gb_control *control) argument
378 gb_control_interface_hibernate_abort(struct gb_control *control) argument
405 struct gb_control *control = to_gb_control(dev); local
414 struct gb_control *control = to_gb_control(dev); local
425 ATTRIBUTE_GROUPS(control); variable
429 struct gb_control *control = to_gb_control(dev); local
447 struct gb_control *control; local
479 gb_control_enable(struct gb_control *control) argument
512 gb_control_disable(struct gb_control *control) argument
522 gb_control_suspend(struct gb_control *control) argument
529 gb_control_resume(struct gb_control *control) argument
543 gb_control_add(struct gb_control *control) argument
558 gb_control_del(struct gb_control *control) argument
564 gb_control_get(struct gb_control *control) argument
571 gb_control_put(struct gb_control *control) argument
576 gb_control_mode_switch_prepare(struct gb_control *control) argument
581 gb_control_mode_switch_complete(struct gb_control *control) argument
[all...]
/linux-master/arch/x86/kvm/svm/
H A Dhyperv.c13 svm->vmcb->control.exit_code = HV_SVM_EXITCODE_ENL;
14 svm->vmcb->control.exit_code_hi = 0;
15 svm->vmcb->control.exit_info_1 = HV_SVM_ENL_EXITCODE_TRAP_AFTER_FLUSH;
16 svm->vmcb->control.exit_info_2 = 0;
/linux-master/arch/arm/mach-rpc/include/mach/
H A Dacornfb.h95 case 1: vidc->control |= VIDC20_CTRL_PIX_CK; break;
96 case 2: vidc->control |= VIDC20_CTRL_PIX_CK2; break;
97 case 3: vidc->control |= VIDC20_CTRL_PIX_CK3; break;
98 case 4: vidc->control |= VIDC20_CTRL_PIX_CK4; break;
99 case 5: vidc->control |= VIDC20_CTRL_PIX_CK5; break;
100 case 6: vidc->control |= VIDC20_CTRL_PIX_CK6; break;
101 case 7: vidc->control |= VIDC20_CTRL_PIX_CK7; break;
102 case 8: vidc->control |= VIDC20_CTRL_PIX_CK8; break;
115 vidc->control |= VIDC20_CTRL_FIFO_24;
117 vidc->control |
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/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_ras_eeprom.c128 * add to control->i2c_address, and then tell I2C layer to read
171 struct amdgpu_ras_eeprom_control *control)
176 if (!control)
189 control->i2c_address = ((u32) i2c_addr) << 16;
198 control->i2c_address = EEPROM_I2C_MADDR_0;
202 control->i2c_address = EEPROM_I2C_MADDR_0;
204 control->i2c_address = EEPROM_I2C_MADDR_4;
207 control->i2c_address = EEPROM_I2C_MADDR_0;
212 control->i2c_address = EEPROM_I2C_MADDR_4;
214 control
170 __get_eeprom_i2c_addr(struct amdgpu_device *adev, struct amdgpu_ras_eeprom_control *control) argument
258 __write_table_header(struct amdgpu_ras_eeprom_control *control) argument
314 __write_table_ras_info(struct amdgpu_ras_eeprom_control *control) argument
351 __calc_hdr_byte_sum(const struct amdgpu_ras_eeprom_control *control) argument
367 __calc_ras_info_byte_sum(const struct amdgpu_ras_eeprom_control *control) argument
382 amdgpu_ras_eeprom_correct_header_tag( struct amdgpu_ras_eeprom_control *control, uint32_t header) argument
407 amdgpu_ras_set_eeprom_table_version(struct amdgpu_ras_eeprom_control *control) argument
430 amdgpu_ras_eeprom_reset_table(struct amdgpu_ras_eeprom_control *control) argument
487 __encode_table_record_to_buf(struct amdgpu_ras_eeprom_control *control, struct eeprom_table_record *record, unsigned char *buf) argument
515 __decode_table_record_from_buf(struct amdgpu_ras_eeprom_control *control, struct eeprom_table_record *record, unsigned char *buf) argument
585 __amdgpu_ras_eeprom_write(struct amdgpu_ras_eeprom_control *control, u8 *buf, const u32 fri, const u32 num) argument
617 amdgpu_ras_eeprom_append_table(struct amdgpu_ras_eeprom_control *control, struct eeprom_table_record *record, const u32 num) argument
730 amdgpu_ras_eeprom_update_header(struct amdgpu_ras_eeprom_control *control) argument
834 amdgpu_ras_eeprom_append(struct amdgpu_ras_eeprom_control *control, struct eeprom_table_record *record, const u32 num) argument
875 __amdgpu_ras_eeprom_read(struct amdgpu_ras_eeprom_control *control, u8 *buf, const u32 fri, const u32 num) argument
917 amdgpu_ras_eeprom_read(struct amdgpu_ras_eeprom_control *control, struct eeprom_table_record *record, const u32 num) argument
1007 amdgpu_ras_eeprom_max_record_count(struct amdgpu_ras_eeprom_control *control) argument
1021 struct amdgpu_ras_eeprom_control *control = ras ? &ras->eeprom_control : NULL; local
1069 amdgpu_ras_debugfs_table_size(struct amdgpu_ras_eeprom_control *control) argument
1075 amdgpu_ras_debugfs_set_ret_size(struct amdgpu_ras_eeprom_control *control) argument
1090 struct amdgpu_ras_eeprom_control *control = &ras->eeprom_control; local
1205 struct amdgpu_ras_eeprom_control *control = ras ? &ras->eeprom_control : NULL; local
1248 __verify_ras_table_checksum(struct amdgpu_ras_eeprom_control *control) argument
1289 __read_table_ras_info(struct amdgpu_ras_eeprom_control *control) argument
1322 amdgpu_ras_eeprom_init(struct amdgpu_ras_eeprom_control *control, bool *exceed_err_limit) argument
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H A Dsmu_v11_0_i2c.c47 static void smu_v11_0_i2c_set_clock_gating(struct i2c_adapter *control, bool en) argument
49 struct amdgpu_smu_i2c_bus *smu_i2c = i2c_get_adapdata(control);
76 static int smu_v11_0_i2c_enable(struct i2c_adapter *control, bool enable) argument
78 struct amdgpu_smu_i2c_bus *smu_i2c = i2c_get_adapdata(control);
102 static void smu_v11_0_i2c_clear_status(struct i2c_adapter *control) argument
104 struct amdgpu_smu_i2c_bus *smu_i2c = i2c_get_adapdata(control);
113 static void smu_v11_0_i2c_configure(struct i2c_adapter *control) argument
115 struct amdgpu_smu_i2c_bus *smu_i2c = i2c_get_adapdata(control);
135 static void smu_v11_0_i2c_set_clock(struct i2c_adapter *control) argument
137 struct amdgpu_smu_i2c_bus *smu_i2c = i2c_get_adapdata(control);
159 smu_v11_0_i2c_set_address(struct i2c_adapter *control, u16 address) argument
171 smu_v11_0_i2c_poll_tx_status(struct i2c_adapter *control) argument
223 smu_v11_0_i2c_poll_rx_status(struct i2c_adapter *control) argument
268 smu_v11_0_i2c_transmit(struct i2c_adapter *control, u16 address, u8 *data, u32 numbytes, u32 i2c_flag) argument
367 smu_v11_0_i2c_receive(struct i2c_adapter *control, u16 address, u8 *data, u32 numbytes, u32 i2c_flag) argument
441 smu_v11_0_i2c_abort(struct i2c_adapter *control) argument
458 smu_v11_0_i2c_activity_done(struct i2c_adapter *control) argument
497 smu_v11_0_i2c_init(struct i2c_adapter *control) argument
520 smu_v11_0_i2c_fini(struct i2c_adapter *control) argument
556 smu_v11_0_i2c_bus_lock(struct i2c_adapter *control) argument
568 smu_v11_0_i2c_bus_unlock(struct i2c_adapter *control) argument
582 smu_v11_0_i2c_read_data(struct i2c_adapter *control, struct i2c_msg *msg, uint32_t i2c_flag) argument
595 smu_v11_0_i2c_write_data(struct i2c_adapter *control, struct i2c_msg *msg, uint32_t i2c_flag) argument
728 struct i2c_adapter *control = &smu_i2c->adapter; local
755 struct i2c_adapter *control = adev->pm.ras_eeprom_i2c_bus; local
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H A Damdgpu_ras_eeprom.h132 int amdgpu_ras_eeprom_init(struct amdgpu_ras_eeprom_control *control,
135 int amdgpu_ras_eeprom_reset_table(struct amdgpu_ras_eeprom_control *control);
139 int amdgpu_ras_eeprom_read(struct amdgpu_ras_eeprom_control *control,
142 int amdgpu_ras_eeprom_append(struct amdgpu_ras_eeprom_control *control,
145 uint32_t amdgpu_ras_eeprom_max_record_count(struct amdgpu_ras_eeprom_control *control);
147 void amdgpu_ras_debugfs_set_ret_size(struct amdgpu_ras_eeprom_control *control);
/linux-master/arch/arm/boot/compressed/
H A Dbig-endian.S11 mrc p15, 0, r0, c1, c0, 0 @ read control reg
13 mcr p15, 0, r0, c1, c0, 0 @ write control reg
/linux-master/drivers/reset/
H A Dreset-ti-sci.c18 * struct ti_sci_reset_control - reset control structure
34 * @idr: idr structure for mapping ids to reset control structures
68 struct ti_sci_reset_control *control; local
72 control = idr_find(&data->idr, id);
73 if (!control)
76 mutex_lock(&control->lock);
78 ret = dev_ops->get_device_resets(sci, control->dev_id, &reset_state);
83 reset_state |= control->reset_mask;
85 reset_state &= ~control->reset_mask;
87 ret = dev_ops->set_device_resets(sci, control
149 struct ti_sci_reset_control *control; local
188 struct ti_sci_reset_control *control; local
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H A Dreset-ti-syscon.c20 * struct ti_syscon_reset_control - reset control structure
21 * @assert_offset: reset assert control register offset from syscon base
22 * @assert_bit: reset assert bit in the reset assert control register
23 * @deassert_offset: reset deassert control register offset from syscon base
24 * @deassert_bit: reset deassert bit in the reset deassert control register
44 * @nr_controls: number of controls in control array
70 struct ti_syscon_reset_control *control; local
76 control = &data->controls[id];
78 if (control->flags & ASSERT_NONE)
81 mask = BIT(control
101 struct ti_syscon_reset_control *control; local
133 struct ti_syscon_reset_control *control; local
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/linux-master/arch/x86/include/asm/
H A Dposted_intr.h24 u64 control; member in union:pi_desc::__anon120
31 return test_and_set_bit(POSTED_INTR_ON, (unsigned long *)&pi_desc->control);
36 return test_and_clear_bit(POSTED_INTR_ON, (unsigned long *)&pi_desc->control);
41 return test_and_clear_bit(POSTED_INTR_SN, (unsigned long *)&pi_desc->control);
56 set_bit(POSTED_INTR_SN, (unsigned long *)&pi_desc->control);
61 set_bit(POSTED_INTR_ON, (unsigned long *)&pi_desc->control);
66 clear_bit(POSTED_INTR_ON, (unsigned long *)&pi_desc->control);
71 clear_bit(POSTED_INTR_SN, (unsigned long *)&pi_desc->control);
76 return test_bit(POSTED_INTR_ON, (unsigned long *)&pi_desc->control);
81 return test_bit(POSTED_INTR_SN, (unsigned long *)&pi_desc->control);
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/linux-master/tools/testing/selftests/cgroup/
H A Dcgroup_util.h27 extern char *cg_control(const char *cgroup, const char *control);
30 extern int cg_read(const char *cgroup, const char *control,
32 extern int cg_read_strcmp(const char *cgroup, const char *control,
34 extern int cg_read_strstr(const char *cgroup, const char *control,
36 extern long cg_read_long(const char *cgroup, const char *control);
37 long cg_read_key_long(const char *cgroup, const char *control, const char *key);
38 extern long cg_read_lc(const char *cgroup, const char *control);
39 extern int cg_write(const char *cgroup, const char *control, char *buf);
40 int cg_write_numeric(const char *cgroup, const char *control, long value);
/linux-master/sound/soc/sof/
H A Dcontrol.c27 if (tplg_ops && tplg_ops->control && tplg_ops->control->volume_get)
28 return tplg_ops->control->volume_get(scontrol, ucontrol);
42 if (tplg_ops && tplg_ops->control && tplg_ops->control->volume_put)
43 return tplg_ops->control->volume_put(scontrol, ucontrol);
79 if (tplg_ops && tplg_ops->control && tplg_ops->control->switch_get)
80 return tplg_ops->control->switch_get(scontrol, ucontrol);
94 if (tplg_ops && tplg_ops->control
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/linux-master/drivers/media/pci/cobalt/
H A Dm00235_fdma_packer_memmap_package.h15 uint32_t control; /* Reg 0x0000, Default=0x0 */ member in struct:m00235_fdma_packer_regmap
24 /* control [3:0] */
H A Dm00460_evcnt_memmap_package.h15 uint32_t control; /* Reg 0x0000, Default=0x0 */ member in struct:m00460_evcnt_regmap
26 /* control [1:0] */
/linux-master/drivers/media/usb/hdpvr/
H A DMakefile2 hdpvr-objs := hdpvr-control.o hdpvr-core.o hdpvr-video.o hdpvr-i2c.o
/linux-master/sound/usb/6fire/
H A Dchip.h23 struct control_runtime *control; member in struct:sfire_chip
/linux-master/sound/aoa/soundbus/i2sbus/
H A DMakefile3 snd-aoa-i2sbus-y := core.o pcm.o control.o
/linux-master/sound/soc/intel/avs/
H A Dcontrol.h12 #include <sound/control.h>
/linux-master/tools/testing/selftests/kvm/x86_64/
H A Dsvm_nested_soft_inject_test.c93 vmcb->control.intercept_exceptions |= BIT(PF_VECTOR) | BIT(UD_VECTOR);
94 vmcb->control.intercept |= BIT(INTERCEPT_NMI) | BIT(INTERCEPT_HLT);
97 vmcb->control.event_inj = SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_NMI;
99 vmcb->control.event_inj = INT_NR | SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_SOFT;
101 vmcb->control.next_rip = vmcb->save.rip;
105 __GUEST_ASSERT(vmcb->control.exit_code == SVM_EXIT_VMMCALL,
107 vmcb->control.exit_code,
108 vmcb->control.exit_info_1, vmcb->control.exit_info_2);
128 vmcb->control
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H A Dvmx_apic_access_test.c41 uint32_t control; local
49 control = vmreadz(CPU_BASED_VM_EXEC_CONTROL);
50 control |= CPU_BASED_ACTIVATE_SECONDARY_CONTROLS;
51 vmwrite(CPU_BASED_VM_EXEC_CONTROL, control);
52 control = vmreadz(SECONDARY_VM_EXEC_CONTROL);
53 control |= SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
54 vmwrite(SECONDARY_VM_EXEC_CONTROL, control);
H A Dhyperv_svm_test.c74 struct hv_vmcb_enlightenments *hve = &vmcb->control.hv_enlightenments;
97 GUEST_ASSERT(vmcb->control.exit_code == SVM_EXIT_VMMCALL);
102 vmcb->control.intercept |= 1ULL << INTERCEPT_MSR_PROT;
105 GUEST_ASSERT(vmcb->control.exit_code == SVM_EXIT_MSR);
111 GUEST_ASSERT(vmcb->control.exit_code == SVM_EXIT_MSR);
117 vmcb->control.clean |= HV_VMCB_NESTED_ENLIGHTENMENTS;
120 GUEST_ASSERT(vmcb->control.exit_code == SVM_EXIT_VMMCALL);
124 vmcb->control.clean &= ~HV_VMCB_NESTED_ENLIGHTENMENTS;
126 GUEST_ASSERT(vmcb->control.exit_code == SVM_EXIT_MSR);
135 GUEST_ASSERT(vmcb->control
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/bios/
H A Dcommand_table_helper.c175 struct bp_encoder_control *control,
184 if ((control->transmitter == TRANSMITTER_UNIPHY_B) ||
185 (control->transmitter == TRANSMITTER_UNIPHY_D) ||
186 (control->transmitter == TRANSMITTER_UNIPHY_F)) {
201 (uint8_t)(h->transmitter_bp_to_atom(control->transmitter));
204 ctrl_param->ucAction = h->encoder_action_to_atom(control->action);
205 ctrl_param->usPixelClock = cpu_to_le16((uint16_t)(control->pixel_clock / 10));
208 control->signal, control->enable_dp_audio));
209 ctrl_param->ucLaneNum = (uint8_t)(control
173 dal_cmd_table_helper_assign_control_parameter( const struct command_table_helper *h, struct bp_encoder_control *control, DIG_ENCODER_CONTROL_PARAMETERS_V2 *ctrl_param) argument
[all...]
/linux-master/sound/core/seq/
H A Dseq_midi_emul.c39 int control, int value);
138 ev->data.control.param, ev->data.control.value);
141 chan->midi_program = ev->data.control.value;
144 chan->midi_pitchbend = ev->data.control.value;
145 if (ops->control)
146 ops->control(drv, MIDI_CTL_PITCHBEND, chan);
149 chan->midi_pressure = ev->data.control.value;
150 if (ops->control)
151 ops->control(dr
258 do_control(const struct snd_midi_op *ops, void *drv, struct snd_midi_channel_set *chset, struct snd_midi_channel *chan, int control, int value) argument
[all...]

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