Searched refs:VPLL (Results 1 - 10 of 10) sorted by relevance
/linux-master/include/dt-bindings/clock/ |
H A D | xlnx-zynqmp-clk.h | 16 #define VPLL 4 macro
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H A D | nuvoton,ma35d1-clk.h | 24 #define VPLL 13 macro
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/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/ |
H A D | xlnx-zynqmp-clk.h | 16 #define VPLL 4 macro
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H A D | nuvoton,ma35d1-clk.h | 24 #define VPLL 13 macro
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/linux-master/drivers/clk/nuvoton/ |
H A D | clk-ma35d1-pll.c | 238 case VPLL: 270 case VPLL:
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H A D | clk-ma35d1.c | 510 hws[VPLL] = ma35d1_reg_clk_pll(dev, VPLL, pllmode[4], "vpll",
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/linux-master/drivers/regulator/ |
H A D | cpcap-regulator.c | 369 CPCAP_REG(VPLL, CPCAP_REG_VPLLC, CPCAP_REG_ASSIGN3, 445 CPCAP_REG(VPLL, CPCAP_REG_VPLLC, CPCAP_REG_ASSIGN3,
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H A D | mc13892-regulator.c | 273 MC13892_DEFINE_REGU(VPLL, vpll, REGULATORMODE0, REGULATORSETTING0,
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H A D | tps65910-regulator.c | 56 /* supported VPLL voltages in microvolts */ 283 EXT_CONTROL_REG_BITS(VPLL, 0, 6),
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/linux-master/drivers/clk/ingenic/ |
H A D | jz4780-cgu.c | 313 .pll = DEF_PLL(VPLL),
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