Searched refs:QS_XTR_GRP_CFG (Results 1 - 11 of 11) sorted by relevance

/linux-master/drivers/net/ethernet/microchip/sparx5/
H A Dsparx5_packet.c310 sparx5, QS_XTR_GRP_CFG(XTR_QUEUE));
H A Dsparx5_fdma.c497 sparx5, QS_XTR_GRP_CFG(XTR_QUEUE));
H A Dsparx5_main_regs.h6305 #define QS_XTR_GRP_CFG(r) __REG(TARGET_QS,\ macro
/linux-master/drivers/net/ethernet/mscc/
H A Dvsc7514_regs.c153 REG(QS_XTR_GRP_CFG, 0x000000),
H A Docelot_fdma.c861 ocelot_write_rix(ocelot, QS_XTR_GRP_CFG_MODE(2), QS_XTR_GRP_CFG, 0);
H A Docelot.c3041 QS_XTR_GRP_CFG_MODE(1), QS_XTR_GRP_CFG, 0);
/linux-master/include/soc/mscc/
H A Docelot.h227 QS_XTR_GRP_CFG = QS << TARGET_OFFSET, enumerator in enum:ocelot_reg
/linux-master/drivers/net/dsa/ocelot/
H A Dseville_vsc9953.c145 REG(QS_XTR_GRP_CFG, 0x000000),
H A Dfelix_vsc9959.c151 REG(QS_XTR_GRP_CFG, 0x000000),
/linux-master/drivers/net/ethernet/microchip/lan966x/
H A Dlan966x_main.c927 lan966x, QS_XTR_GRP_CFG(0));
H A Dlan966x_regs.h1188 #define QS_XTR_GRP_CFG(r) __REG(TARGET_QS, 0, 1, 0, 0, 1, 36, 0, r, 2, 4) macro

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