Searched refs:QS_INJ_GRP_CFG (Results 1 - 11 of 11) sorted by relevance

/linux-master/drivers/net/ethernet/microchip/sparx5/
H A Dsparx5_packet.c313 sparx5, QS_INJ_GRP_CFG(INJ_QUEUE));
H A Dsparx5_fdma.c500 sparx5, QS_INJ_GRP_CFG(INJ_QUEUE));
H A Dsparx5_main_regs.h6351 #define QS_INJ_GRP_CFG(r) __REG(TARGET_QS,\ macro
/linux-master/drivers/net/ethernet/mscc/
H A Dvsc7514_regs.c159 REG(QS_INJ_GRP_CFG, 0x000024),
H A Docelot_fdma.c858 ocelot_write_rix(ocelot, QS_INJ_GRP_CFG_MODE(2), QS_INJ_GRP_CFG, 0);
H A Docelot.c3039 QS_INJ_GRP_CFG_MODE(1), QS_INJ_GRP_CFG, 0);
/linux-master/include/soc/mscc/
H A Docelot.h233 QS_INJ_GRP_CFG, enumerator in enum:ocelot_reg
/linux-master/drivers/net/dsa/ocelot/
H A Dseville_vsc9953.c151 REG(QS_INJ_GRP_CFG, 0x000024),
H A Dfelix_vsc9959.c157 REG(QS_INJ_GRP_CFG, 0x000024),
/linux-master/drivers/net/ethernet/microchip/lan966x/
H A Dlan966x_main.c932 lan966x, QS_INJ_GRP_CFG(0));
H A Dlan966x_regs.h1212 #define QS_INJ_GRP_CFG(r) __REG(TARGET_QS, 0, 1, 36, 0, 1, 40, 0, r, 2, 4) macro

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