Searched refs:CMU_REG1_PLL_CP_SEL_SET (Results 1 - 1 of 1) sorted by relevance
| /linux-master/drivers/phy/ | ||
| H A D | phy-xgene.c | 137 #define CMU_REG1_PLL_CP_SEL_SET(dst, src) \ macro 787 val = CMU_REG1_PLL_CP_SEL_SET(val, 0x5); 789 val = CMU_REG1_PLL_CP_SEL_SET(val, 0x3); |
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