Searched refs:CLK_TOP_SPI (Results 1 - 25 of 25) sorted by relevance

/linux-master/include/dt-bindings/clock/
H A Dmt7629-clk.h73 #define CLK_TOP_SPI 63 macro
H A Dmt8516-clk.h100 #define CLK_TOP_SPI 68 macro
H A Dmediatek,mt7981-clk.h58 #define CLK_TOP_SPI 45 macro
H A Dmt6765-clk.h94 #define CLK_TOP_SPI 59 macro
H A Dmt6779-clk.h17 #define CLK_TOP_SPI 7 macro
H A Dmt8186-clk.h30 #define CLK_TOP_SPI 11 macro
H A Dmediatek,mt8188-clk.h36 #define CLK_TOP_SPI 25 macro
H A Dmt8195-clk.h39 #define CLK_TOP_SPI 27 macro
/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dmt7629-clk.h73 #define CLK_TOP_SPI 63 macro
H A Dmt8516-clk.h100 #define CLK_TOP_SPI 68 macro
H A Dmediatek,mt7981-clk.h58 #define CLK_TOP_SPI 45 macro
H A Dmt6765-clk.h94 #define CLK_TOP_SPI 59 macro
H A Dmt6779-clk.h17 #define CLK_TOP_SPI 7 macro
H A Dmt8186-clk.h30 #define CLK_TOP_SPI 11 macro
H A Dmediatek,mt8188-clk.h36 #define CLK_TOP_SPI 25 macro
H A Dmt8195-clk.h39 #define CLK_TOP_SPI 27 macro
/linux-master/drivers/clk/mediatek/
H A Dclk-mt7981-topckgen.c68 FACTOR(CLK_TOP_SPI, "spi", "spi_sel", 1, 1),
H A Dclk-mt8167.c780 GATE_TOP1(CLK_TOP_SPI, "spi", "spi_sel", 23),
H A Dclk-mt8186-topckgen.c531 MUX_GATE_CLR_SET_UPD(CLK_TOP_SPI, "top_spi",
H A Dclk-mt8516.c571 GATE_TOP1(CLK_TOP_SPI, "spi", "spi_sel", 23),
H A Dclk-mt7629.c416 FACTOR(CLK_TOP_SPI, "spi", "spi0_sel", 1, 1),
H A Dclk-mt6765.c142 FACTOR(CLK_TOP_SPI, "spi_ck", "spi_sel", 1, 1),
H A Dclk-mt8188-topckgen.c1015 MUX_GATE_CLR_SET_UPD(CLK_TOP_SPI, "top_spi",
H A Dclk-mt6779.c686 MUX_GATE_CLR_SET_UPD(CLK_TOP_SPI, "spi_sel", spi_parents,
H A Dclk-mt8195-topckgen.c939 MUX_GATE_CLR_SET_UPD(CLK_TOP_SPI, "top_spi",

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