Searched refs:CLK_TOP_MSDC30_1 (Results 1 - 18 of 18) sorted by relevance
| /linux-master/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 72 #define CLK_TOP_MSDC30_1 62 macro
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| H A D | mt6765-clk.h | 96 #define CLK_TOP_MSDC30_1 61 macro
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| H A D | mt6779-clk.h | 20 #define CLK_TOP_MSDC30_1 10 macro
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| H A D | mt8186-clk.h | 33 #define CLK_TOP_MSDC30_1 14 macro
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| H A D | mediatek,mt8188-clk.h | 39 #define CLK_TOP_MSDC30_1 28 macro
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| H A D | mt8195-clk.h | 43 #define CLK_TOP_MSDC30_1 31 macro
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| /linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 72 #define CLK_TOP_MSDC30_1 62 macro
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| H A D | mt6765-clk.h | 96 #define CLK_TOP_MSDC30_1 61 macro
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| H A D | mt6779-clk.h | 20 #define CLK_TOP_MSDC30_1 10 macro
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| H A D | mt8186-clk.h | 33 #define CLK_TOP_MSDC30_1 14 macro
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| H A D | mediatek,mt8188-clk.h | 39 #define CLK_TOP_MSDC30_1 28 macro
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| H A D | mt8195-clk.h | 43 #define CLK_TOP_MSDC30_1 31 macro
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| /linux-master/drivers/clk/mediatek/ |
| H A D | clk-mt8186-topckgen.c | 538 MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_MSDC30_1, "top_msdc30_1",
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| H A D | clk-mt7629.c | 415 FACTOR(CLK_TOP_MSDC30_1, "msdc30_1", "msdc30_1_sel", 1, 1),
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| H A D | clk-mt6765.c | 144 FACTOR(CLK_TOP_MSDC30_1, "msdc30_1_ck", "msdc30_1_sel", 1, 1),
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| H A D | clk-mt8188-topckgen.c | 1022 MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_MSDC30_1, "top_msdc30_1",
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| H A D | clk-mt6779.c | 695 MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_MSDC30_1, "msdc30_1_sel",
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| H A D | clk-mt8195-topckgen.c | 948 MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_MSDC30_1, "top_msdc30_1",
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Completed in 337 milliseconds