Searched refs:CLK_TOP_DXCC (Results 1 - 12 of 12) sorted by relevance

/linux-master/include/dt-bindings/clock/
H A Dmt6765-clk.h102 #define CLK_TOP_DXCC 67 macro
H A Dmt6779-clk.h39 #define CLK_TOP_DXCC 29 macro
H A Dmt8186-clk.h42 #define CLK_TOP_DXCC 23 macro
H A Dmt8195-clk.h70 #define CLK_TOP_DXCC 58 macro
/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dmt6765-clk.h102 #define CLK_TOP_DXCC 67 macro
H A Dmt6779-clk.h39 #define CLK_TOP_DXCC 29 macro
H A Dmt8186-clk.h42 #define CLK_TOP_DXCC 23 macro
H A Dmt8195-clk.h70 #define CLK_TOP_DXCC 58 macro
/linux-master/drivers/clk/mediatek/
H A Dclk-mt8186-topckgen.c563 MUX_GATE_CLR_SET_UPD(CLK_TOP_DXCC, "top_dxcc",
H A Dclk-mt6765.c150 FACTOR(CLK_TOP_DXCC, "dxcc_ck", "dxcc_sel", 1, 1),
H A Dclk-mt6779.c741 MUX_GATE_CLR_SET_UPD(CLK_TOP_DXCC, "dxcc_sel", dxcc_parents,
H A Dclk-mt8195-topckgen.c1014 MUX_GATE_CLR_SET_UPD(CLK_TOP_DXCC, "top_dxcc",

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