Searched refs:CLK_TOP_AXI (Results 1 - 15 of 15) sorted by relevance

/linux-master/include/dt-bindings/clock/
H A Dmt6765-clk.h89 #define CLK_TOP_AXI 54 macro
H A Dmt6779-clk.h11 #define CLK_TOP_AXI 1 macro
H A Dmt8186-clk.h19 #define CLK_TOP_AXI 0 macro
H A Dmediatek,mt8188-clk.h11 #define CLK_TOP_AXI 0 macro
H A Dmt8195-clk.h12 #define CLK_TOP_AXI 0 macro
/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dmt6765-clk.h89 #define CLK_TOP_AXI 54 macro
H A Dmt6779-clk.h11 #define CLK_TOP_AXI 1 macro
H A Dmt8186-clk.h19 #define CLK_TOP_AXI 0 macro
H A Dmediatek,mt8188-clk.h11 #define CLK_TOP_AXI 0 macro
H A Dmt8195-clk.h12 #define CLK_TOP_AXI 0 macro
/linux-master/drivers/clk/mediatek/
H A Dclk-mt8186-topckgen.c505 MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_AXI, "top_axi", axi_parents,
H A Dclk-mt6765.c137 FACTOR(CLK_TOP_AXI, "axi_ck", "axi_sel", 1, 1),
H A Dclk-mt8188-topckgen.c955 MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_AXI, "top_axi", axi_parents,
H A Dclk-mt6779.c639 MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_AXI, "axi_sel", axi_parents,
H A Dclk-mt8195-topckgen.c875 MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_AXI, "top_axi",

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