Searched refs:CLK_TOP_AUD_1 (Results 1 - 9 of 9) sorted by relevance
| /linux-master/include/dt-bindings/clock/ |
| H A D | mt6765-clk.h | 98 #define CLK_TOP_AUD_1 63 macro
|
| H A D | mt6779-clk.h | 30 #define CLK_TOP_AUD_1 20 macro
|
| H A D | mt8186-clk.h | 36 #define CLK_TOP_AUD_1 17 macro
|
| /linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | mt6765-clk.h | 98 #define CLK_TOP_AUD_1 63 macro
|
| H A D | mt6779-clk.h | 30 #define CLK_TOP_AUD_1 20 macro
|
| H A D | mt8186-clk.h | 36 #define CLK_TOP_AUD_1 17 macro
|
| /linux-master/drivers/clk/mediatek/ |
| H A D | clk-mt8186-topckgen.c | 545 MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD_1, "top_aud_1",
|
| H A D | clk-mt6765.c | 146 FACTOR(CLK_TOP_AUD_1, "aud_1_ck", "aud_1_sel", 1, 1),
|
| H A D | clk-mt6779.c | 756 MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD_1, "aud_1_sel", aud_1_parents,
|
Completed in 214 milliseconds