Searched refs:CLK_MM_DISP_RSZ0 (Results 1 - 9 of 9) sorted by relevance
| /linux-master/drivers/clk/mediatek/ |
| H A D | clk-mt6765-mm.c | 35 GATE_MM(CLK_MM_DISP_RSZ0, "mm_disp_rsz0", "mm_ck", 9),
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| H A D | clk-mt8186-mm.c | 39 GATE_MM0(CLK_MM_DISP_RSZ0, "mm_disp_rsz0", "top_disp", 7),
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| H A D | clk-mt8192-mm.c | 50 GATE_MM0(CLK_MM_DISP_RSZ0, "mm_disp_rsz0", "disp_sel", 7),
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| /linux-master/include/dt-bindings/clock/ |
| H A D | mt6765-clk.h | 260 #define CLK_MM_DISP_RSZ0 9 macro
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| H A D | mt8192-clk.h | 431 #define CLK_MM_DISP_RSZ0 7 macro
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| H A D | mt8186-clk.h | 307 #define CLK_MM_DISP_RSZ0 6 macro
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| /linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | mt6765-clk.h | 260 #define CLK_MM_DISP_RSZ0 9 macro
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| H A D | mt8192-clk.h | 431 #define CLK_MM_DISP_RSZ0 7 macro
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| H A D | mt8186-clk.h | 307 #define CLK_MM_DISP_RSZ0 6 macro
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