Searched refs:CLK_IFR_AP_MSDC0 (Results 1 - 6 of 6) sorted by relevance
/linux-master/include/dt-bindings/clock/ |
H A D | mt6765-clk.h | 218 #define CLK_IFR_AP_MSDC0 54 macro
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H A D | mediatek,mt8365-clk.h | 194 #define CLK_IFR_AP_MSDC0 41 macro
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/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/ |
H A D | mt6765-clk.h | 218 #define CLK_IFR_AP_MSDC0 54 macro
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H A D | mediatek,mt8365-clk.h | 194 #define CLK_IFR_AP_MSDC0 41 macro
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/linux-master/drivers/clk/mediatek/ |
H A D | clk-mt8365.c | 720 GATE_IFR5(CLK_IFR_AP_MSDC0, "ifr_ap_msdc0", "msdc50_0_sel", 7),
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H A D | clk-mt6765.c | 619 GATE_IFR5(CLK_IFR_AP_MSDC0, "ifr_ap_msdc0", "msdc50_0_ck", 7),
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