Searched refs:CLKID_MPLL1_DIV (Results 1 - 15 of 15) sorted by relevance

/linux-master/include/dt-bindings/clock/
H A Damlogic,s4-pll-clkc.h36 #define CLKID_MPLL1_DIV 26 macro
H A Daxg-clkc.h77 #define CLKID_MPLL1_DIV 66 macro
H A Dgxbb-clkc.h151 #define CLKID_MPLL1_DIV 143 macro
H A Dmeson8b-clkc.h104 #define CLKID_MPLL1_DIV 97 macro
H A Dg12a-clkc.h81 #define CLKID_MPLL1_DIV 70 macro
/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Damlogic,s4-pll-clkc.h36 #define CLKID_MPLL1_DIV 26 macro
H A Daxg-clkc.h77 #define CLKID_MPLL1_DIV 66 macro
H A Dmeson8b-clkc.h104 #define CLKID_MPLL1_DIV 97 macro
H A Dgxbb-clkc.h151 #define CLKID_MPLL1_DIV 143 macro
H A Dg12a-clkc.h81 #define CLKID_MPLL1_DIV 70 macro
/linux-master/drivers/clk/meson/
H A Ds4-pll.c758 [CLKID_MPLL1_DIV] = &s4_mpll1_div.hw,
H A Dgxbb.c2876 [CLKID_MPLL1_DIV] = &gxbb_mpll1_div.hw,
3083 [CLKID_MPLL1_DIV] = &gxbb_mpll1_div.hw,
H A Dmeson8b.c2873 [CLKID_MPLL1_DIV] = &meson8b_mpll1_div.hw,
3077 [CLKID_MPLL1_DIV] = &meson8b_mpll1_div.hw,
3292 [CLKID_MPLL1_DIV] = &meson8b_mpll1_div.hw,
H A Dg12a.c4452 [CLKID_MPLL1_DIV] = &g12a_mpll1_div.hw,
4679 [CLKID_MPLL1_DIV] = &g12a_mpll1_div.hw,
4947 [CLKID_MPLL1_DIV] = &g12a_mpll1_div.hw,
H A Daxg.c1962 [CLKID_MPLL1_DIV] = &axg_mpll1_div.hw,

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