Searched refs:CLKID_MPLL0_DIV (Results 1 - 15 of 15) sorted by relevance
/linux-master/include/dt-bindings/clock/ |
H A D | amlogic,s4-pll-clkc.h | 34 #define CLKID_MPLL0_DIV 24 macro
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H A D | axg-clkc.h | 76 #define CLKID_MPLL0_DIV 65 macro
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H A D | gxbb-clkc.h | 150 #define CLKID_MPLL0_DIV 142 macro
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H A D | meson8b-clkc.h | 103 #define CLKID_MPLL0_DIV 96 macro
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H A D | g12a-clkc.h | 80 #define CLKID_MPLL0_DIV 69 macro
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/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/ |
H A D | amlogic,s4-pll-clkc.h | 34 #define CLKID_MPLL0_DIV 24 macro
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H A D | axg-clkc.h | 76 #define CLKID_MPLL0_DIV 65 macro
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H A D | meson8b-clkc.h | 103 #define CLKID_MPLL0_DIV 96 macro
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H A D | gxbb-clkc.h | 150 #define CLKID_MPLL0_DIV 142 macro
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H A D | g12a-clkc.h | 80 #define CLKID_MPLL0_DIV 69 macro
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/linux-master/drivers/clk/meson/ |
H A D | s4-pll.c | 756 [CLKID_MPLL0_DIV] = &s4_mpll0_div.hw,
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H A D | gxbb.c | 2875 [CLKID_MPLL0_DIV] = &gxbb_mpll0_div.hw, 3082 [CLKID_MPLL0_DIV] = &gxl_mpll0_div.hw,
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H A D | meson8b.c | 2872 [CLKID_MPLL0_DIV] = &meson8b_mpll0_div.hw, 3076 [CLKID_MPLL0_DIV] = &meson8b_mpll0_div.hw, 3291 [CLKID_MPLL0_DIV] = &meson8b_mpll0_div.hw,
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H A D | g12a.c | 4451 [CLKID_MPLL0_DIV] = &g12a_mpll0_div.hw, 4678 [CLKID_MPLL0_DIV] = &g12a_mpll0_div.hw, 4946 [CLKID_MPLL0_DIV] = &g12a_mpll0_div.hw,
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H A D | axg.c | 1961 [CLKID_MPLL0_DIV] = &axg_mpll0_div.hw,
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