Searched refs:AR_WA (Results 1 - 9 of 9) sorted by relevance
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar9002/ |
H A D | ar9285_attach.c | 442 val = OS_REG_READ(ah, AR_WA); 464 OS_REG_WRITE(ah, AR_WA, val); 478 OS_REG_WRITE(ah, AR_WA, val);
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H A D | ar9280_attach.c | 449 val = OS_REG_READ(ah, AR_WA); 473 OS_REG_WRITE(ah, AR_WA, val); 481 OS_REG_WRITE(ah, AR_WA, val);
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H A D | ar9287_attach.c | 379 OS_REG_WRITE(ah, AR_WA, AR9285_WA_DEFAULT);
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/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/contrib/ath_hal/ar9300/ |
H A D | ar9300_power.c | 501 /* Set Bits 14 and 17 of AR_WA before powering on the chip. */ 502 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_WA), ahp->ah_wa_reg_val); 584 /* Clear Bit 14 of AR_WA after putting chip into Full Sleep mode. */ 585 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_WA), 642 /* Clear Bit 14 of AR_WA after putting chip into Sleep mode. */ 643 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_WA), 1066 wa_reg_val = OS_REG_READ(ah, AR_HOSTIF_REG(ah, AR_WA)); 1084 "%s: Set AR_WA.13 COLD_RESET_OVERRIDE\n", __func__); 1093 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_WA), wa_reg_val); 1530 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_WA), OS_REG_REA [all...] |
H A D | ar9300_attach.c | 698 * Read back AR_WA into a permanent copy and set bits 14 and 17. 701 * If not, the AR_WA register which was inited via EEPROM 704 ahp->ah_wa_reg_val = OS_REG_READ(ah, AR_HOSTIF_REG(ah, AR_WA)); 705 /* Set Bits 14 and 17 in the AR_WA register. */ 723 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_WA), ahp->ah_wa_reg_val); 3163 AR_HOSTIF_REG(ah, AR_WA), 3166 /* Set Bits 17 and 14 in the AR_WA register. */ 3167 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_WA), ahp->ah_wa_reg_val); 4106 AR_HOSTIF_REG(ah, AR_WA) = 4221 AR_HOSTIF_REG(ah, AR_WA) [all...] |
H A D | ar9300_reset.c | 1693 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_WA), AH9300(ah)->ah_wa_reg_val); 1694 OS_DELAY(10); /* delay to allow AR_WA reg write to kick in */ 1888 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_WA), AH9300(ah)->ah_wa_reg_val); 1889 OS_DELAY(10); /* delay to allow AR_WA reg write to kick in */ 1936 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_WA), AH9300(ah)->ah_wa_reg_val); 1937 OS_DELAY(10); /* delay to allow AR_WA reg write to kick in */
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H A D | ar9300.h | 719 u_int32_t AR_WA; member in struct:ath_hal_9300::__anon10
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/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5416/ |
H A D | ar5416reg.h | 36 #define AR_WA 0x4004 /* PCIE work-arounds */ macro
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H A D | ar5416_attach.c | 540 OS_REG_WRITE(ah, AR_WA, AR_WA_DEFAULT);
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