Searched refs:pte (Results 1 - 8 of 8) sorted by relevance
/fuchsia/zircon/kernel/arch/x86/page_tables/include/arch/x86/page_tables/ |
H A D | constants.h | 41 #define IS_PAGE_PRESENT(pte) ((pte) & X86_MMU_PG_P) 42 #define IS_LARGE_PAGE(pte) ((pte) & X86_MMU_PG_PS)
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H A D | page_tables.h | 176 volatile pt_entry_t* pte, ConsistencyManager* cm) TA_REQ(lock_); 179 volatile pt_entry_t* pte, paddr_t paddr, PtFlags flags, 182 volatile pt_entry_t* pte, bool was_terminal) TA_REQ(lock_);
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/fuchsia/zircon/kernel/arch/arm64/ |
H A D | mmu.cpp | 188 static void s1_pte_attr_to_mmu_flags(pte_t pte, uint* mmu_flags) { argument 189 switch (pte & MMU_PTE_ATTR_ATTR_INDEX_MASK) { 207 switch (pte & MMU_PTE_ATTR_AP_MASK) { 221 if (!((pte & MMU_PTE_ATTR_UXN) && (pte & MMU_PTE_ATTR_PXN))) { 224 if (pte & MMU_PTE_ATTR_NON_SECURE) { 261 static void s2_pte_attr_to_mmu_flags(pte_t pte, uint* mmu_flags) { argument 262 switch (pte & MMU_S2_PTE_ATTR_ATTR_INDEX_MASK) { 280 switch (pte & MMU_PTE_ATTR_AP_MASK) { 290 if (pte 304 pte_t pte; local [all...] |
/fuchsia/zircon/system/dev/display/intel-i915/ |
H A D | gtt.cpp | 92 uint64_t pte = gen_pte_encode(scratch_buffer_paddr_); local 95 controller_->mmio_space()->Write<uint64_t>(get_pte_offset(i), pte); local 122 uint64_t pte = gen_pte_encode(stolen_fb); local 123 controller_->mmio_space()->Write<uint64_t>(get_pte_offset(pte_idx++), pte); 181 uint64_t pte = gen_pte_encode(paddrs[i] + j * PAGE_SIZE); local 182 gtt_->controller_->mmio_space()->Write<uint64_t>(get_pte_offset(pte_idx++), pte); 197 uint64_t pte = gen_pte_encode(gtt_->scratch_buffer_paddr_); local 202 mmio_space->Write<uint64_t>(pte_offset, pte);
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/fuchsia/zircon/kernel/arch/x86/page_tables/ |
H A D | page_tables.cpp | 61 paddr_t paddr_from_pte(PageTableLevel level, pt_entry_t pte) { argument 62 DEBUG_ASSERT(IS_PAGE_PRESENT(pte)); 67 pa = (pte & X86_HUGE_PAGE_FRAME); 70 pa = (pte & X86_LARGE_PAGE_FRAME); 73 pa = (pte & X86_PG_FRAME); 258 volatile pt_entry_t* pte, paddr_t paddr, PtFlags flags, 260 DEBUG_ASSERT(pte); 263 pt_entry_t olde = *pte; 266 *pte = paddr | flags | X86_MMU_PG_P; 267 cm->cache_line_flusher()->FlushPtEntry(pte); 257 UpdateEntry(ConsistencyManager* cm, PageTableLevel level, vaddr_t vaddr, volatile pt_entry_t* pte, paddr_t paddr, PtFlags flags, bool was_terminal) argument 277 UnmapEntry(ConsistencyManager* cm, PageTableLevel level, vaddr_t vaddr, volatile pt_entry_t* pte, bool was_terminal) argument 317 SplitLargePage(PageTableLevel level, vaddr_t vaddr, volatile pt_entry_t* pte, ConsistencyManager* cm) argument [all...] |
/fuchsia/zircon/kernel/arch/x86/ |
H A D | start.S | 74 movl $PHYS(pte), %eax 84 movl $PHYS(pte), %eax 89 movl $PHYS(pte), %esi
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H A D | mmu.cpp | 40 volatile pt_entry_t pte[NO_OF_PT_ENTRIES] __ALIGNED(PAGE_SIZE);
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/fuchsia/zircon/kernel/arch/arm64/hypervisor/ |
H A D | vmexit.cpp | 142 auto* pte = static_cast<pte_t*>(paddr_to_physmap(table)); local 146 pte_t desc = pte[i] & MMU_PTE_DESCRIPTOR_MASK; 147 pte_t paddr = pte[i] & MMU_PTE_OUTPUT_ADDR_MASK;
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