Searched refs:READ32_REG (Results 1 - 8 of 8) sorted by relevance
/fuchsia/zircon/system/dev/display/astro-display/ |
H A D | aml-dsi-host.cpp | 259 DISP_INFO("DW_DSI_VERSION = 0x%x\n", READ32_REG(MIPI_DSI, DW_DSI_VERSION)); 260 DISP_INFO("DW_DSI_PWR_UP = 0x%x\n", READ32_REG(MIPI_DSI, DW_DSI_PWR_UP)); 261 DISP_INFO("DW_DSI_CLKMGR_CFG = 0x%x\n", READ32_REG(MIPI_DSI, DW_DSI_CLKMGR_CFG)); 262 DISP_INFO("DW_DSI_DPI_VCID = 0x%x\n", READ32_REG(MIPI_DSI, DW_DSI_DPI_VCID)); 263 DISP_INFO("DW_DSI_DPI_COLOR_CODING = 0x%x\n", READ32_REG(MIPI_DSI, DW_DSI_DPI_COLOR_CODING)); 264 DISP_INFO("DW_DSI_DPI_CFG_POL = 0x%x\n", READ32_REG(MIPI_DSI, DW_DSI_DPI_CFG_POL)); 265 DISP_INFO("DW_DSI_DPI_LP_CMD_TIM = 0x%x\n", READ32_REG(MIPI_DSI, DW_DSI_DPI_LP_CMD_TIM)); 266 DISP_INFO("DW_DSI_DBI_VCID = 0x%x\n", READ32_REG(MIPI_DSI, DW_DSI_DBI_VCID)); 267 DISP_INFO("DW_DSI_DBI_CFG = 0x%x\n", READ32_REG(MIPI_DSI, DW_DSI_DBI_CFG)); 269 READ32_REG(MIPI_DS [all...] |
H A D | osd.cpp | 267 uint32_t regVal = READ32_REG(VPU, VPP_OFIFO_SIZE); 321 DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg)); 323 DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg)); 325 DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg)); 327 DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg)); 330 DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg)); 332 DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg)); 334 DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg)); 336 DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg)); 338 DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VP [all...] |
H A D | aml-mipi-phy.cpp | 294 DISP_INFO("MIPI_DSI_PHY_CTRL = 0x%x\n", READ32_REG(DSI_PHY, MIPI_DSI_PHY_CTRL)); 295 DISP_INFO("MIPI_DSI_CHAN_CTRL = 0x%x\n", READ32_REG(DSI_PHY, MIPI_DSI_CHAN_CTRL)); 296 DISP_INFO("MIPI_DSI_CHAN_STS = 0x%x\n", READ32_REG(DSI_PHY, MIPI_DSI_CHAN_STS)); 297 DISP_INFO("MIPI_DSI_CLK_TIM = 0x%x\n", READ32_REG(DSI_PHY, MIPI_DSI_CLK_TIM)); 298 DISP_INFO("MIPI_DSI_HS_TIM = 0x%x\n", READ32_REG(DSI_PHY, MIPI_DSI_HS_TIM)); 299 DISP_INFO("MIPI_DSI_LP_TIM = 0x%x\n", READ32_REG(DSI_PHY, MIPI_DSI_LP_TIM)); 300 DISP_INFO("MIPI_DSI_ANA_UP_TIM = 0x%x\n", READ32_REG(DSI_PHY, MIPI_DSI_ANA_UP_TIM)); 301 DISP_INFO("MIPI_DSI_INIT_TIM = 0x%x\n", READ32_REG(DSI_PHY, MIPI_DSI_INIT_TIM)); 302 DISP_INFO("MIPI_DSI_WAKEUP_TIM = 0x%x\n", READ32_REG(DSI_PHY, MIPI_DSI_WAKEUP_TIM)); 303 DISP_INFO("MIPI_DSI_LPOK_TIM = 0x%x\n", READ32_REG(DSI_PH [all...] |
H A D | common.h | 27 #define READ32_REG(x, a) READ32_##x##_REG(a) macro
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H A D | dw-mipi-dsi.cpp | 94 *data = READ32_REG(MIPI_DSI, DW_DSI_GEN_PLD_DATA);
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H A D | astro-clock.cpp | 343 WRITE32_REG(VPU, VPP_MISC, READ32_REG(VPU, VPP_MISC) & ~(VPP_OUT_SATURATE));
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/fuchsia/zircon/system/dev/display/vim-display/ |
H A D | hdmitx.cpp | 853 regval = (READ32_REG(VPU, VPU_HDMI_SETTING) & 0xf00) >> 8; 887 reg_val = READ32_REG(HHI, ladr); 893 reg_val = READ32_REG(VPU, ladr); 898 reg_val = READ32_REG(VPU, ladr); 903 reg_val = READ32_REG(VPU, ladr);
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H A D | hdmitx.h | 51 #define READ32_REG(x, a) READ32_##x##_REG(a) macro
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