display/astro-display/osd.cpp

267     uint32_t regVal = READ32_REG(VPU, VPP_OFIFO_SIZE);
321     DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg));
323     DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg));
325     DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg));
327     DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg));
330     DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg));
332     DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg));
334     DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg));
336     DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg));
338     DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg));
340     DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg));
342     DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg));
344     DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg));
346     DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg));
348     DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg));
350     DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg));
352     DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg));
354     DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg));
356     DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg));
359     DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg));
361     DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg));
363     DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg));
365     DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg));
367     DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg));
369     DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg));
371     DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg));
373     DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg));
375     DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg));
378     DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg));
380     DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg));
382     DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg));
384     DISP_INFO("reg[0x%x]: 0x%08x\n\n", reg, READ32_REG(VPU, reg));
386     DISP_INFO("reg[0x%x]: 0x%08x\n\n", reg, READ32_REG(VPU, reg));
391         DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg));
393         DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg));
395         DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg));
397         DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg));
399         DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg));
401         DISP_INFO("reg[0x%x]: 0x%08x\n", reg, READ32_REG(VPU, reg));
405         DISP_INFO("reg[0x%x]: 0x%08x\n\n", reg, READ32_REG(VPU, reg));