Searched refs:PLC_LINK_CAPABLE_X1 (Results 1 - 4 of 4) sorted by relevance

/fuchsia/zircon/system/dev/pci/amlogic-pcie/
H A Daml-pcie-regs.h24 #define PLC_LINK_CAPABLE_X1 (0x01 << 16) macro
H A Daml-pcie.cpp92 val |= PLC_LINK_CAPABLE_X1;
/fuchsia/zircon/system/dev/pci/designware/
H A Ddw-pcie-hw.h36 #define PLC_LINK_CAPABLE_X1 (0x01 << 16) macro
H A Ddw-pcie.cpp133 portLinkMode = PLC_LINK_CAPABLE_X1;

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