[pci][dw][aml] Refactor AMLogic PCIe Driver

Refactor the AMLogic PCIe driver into two halves:

(1) The DesignWare PCIe Library
(2) The AMLogic PCIe Driver

The AMLogic Driver statically links against the DesignWare PCIe
Library. Logic that is common to the DesignWare IP exists only in
the library whereas individual SoCs can implement their own drivers
that use the common DesignWare code.

Subsequent CLs will introduce the HiSilicon implementation of the DW
PCIe block as well.

TEST: Booted on gauss and confirmed that PCI bus driver started,
published devices and that devices were able to bind.

Change-Id: I76a438c5781e649d3f274de20378bd6d29e21868

[aml][pcie][dw] Start Kernel PCI Driver

Start the Kernel PCI driver from the AMLogic
PCIe driver.

Change-Id: I4cca1bb0c83bf91e1d1f9e121bc36bcfe4589aee

[gauss][aml][pcie] Fix PCIe Reset buffer base

Pbus_mmio_t allows unaligned buffers and sizes
so handle this natively in the board driver
rather than making the PCIe driver handle it.

Change-Id: Ic7a303339a9de874ea3b73221a820f2944df32f1

[aml][pcie][dw] DW/Amlogic PCIe for Gauss

Implements a low level PCIe driver for the
Amlogic configuration of the DesignWare PCIe
controller.

The DW controller provides an address
translation unit that can be programmed to
translate addresses from the host address space
into PCI address space.

This driver configures one segment of the host's
address space to translate into the PCI ECAM
registers and programs the rest of the host's
PCI address space to be reserved for BARs.

A follow up patch will instantiate the PCI
bus driver using these address spaces.

Change-Id: I423f14ea2229af8f12b6f03882270b59acbc7a7b