/freebsd-current/sys/dev/rtwn/rtl8821a/ |
H A D | r21a_chan.c | 64 rtwn_bb_setbits(sc, R12A_RFE_INV(0), 0x00100000, 0); 65 rtwn_bb_setbits(sc, R12A_RFE_INV(0), 0x00400000, 0); 66 rtwn_bb_setbits(sc, R12A_RFE_PINMUX(0), 0, 0x07); 67 rtwn_bb_setbits(sc, R12A_RFE_PINMUX(0), 0, 0x0700); 76 rtwn_bb_setbits(sc, R12A_OFDMCCK_EN, 80 rtwn_bb_setbits(sc, R12A_RFE_PINMUX(0), 82 rtwn_bb_setbits(sc, R12A_RFE_PINMUX(0), 87 rtwn_bb_setbits(sc, R12A_RFE_INV(0), 0, 0x00100000); 88 rtwn_bb_setbits(sc, R12A_RFE_INV(0), 0x00400000, 0); 89 rtwn_bb_setbits(s [all...] |
H A D | r21a_calib.c | 108 rtwn_bb_setbits(sc, R12A_TXAGC_TABLE_SELECT, 0, 0x80000000);
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/freebsd-current/sys/dev/rtwn/rtl8812a/ |
H A D | r12a_chan.c | 276 rtwn_bb_setbits(sc, R12A_RFMOD, 0, 0xc00); 277 rtwn_bb_setbits(sc, R12A_ADC_BUF_CLK, 0, 0x40000000); 279 rtwn_bb_setbits(sc, R12A_RFMOD, 0x400, 0x800); 283 rtwn_bb_setbits(sc, R12A_RFMOD, 0, 0x300); 284 rtwn_bb_setbits(sc, R12A_ADC_BUF_CLK, 287 rtwn_bb_setbits(sc, R12A_RFMOD, 0x100, 0x200); 288 rtwn_bb_setbits(sc, R12A_ADC_BUF_CLK, 296 rtwn_bb_setbits(sc, R12A_RFMOD, 0, 0x300); 298 rtwn_bb_setbits(sc, R12A_RFMOD, 0x100, 0x200); 349 rtwn_bb_setbits(s [all...] |
H A D | r12a_calib.c | 133 rtwn_bb_setbits(sc, R12A_TXAGC_TABLE_SELECT, 0x80000000, 0); 146 rtwn_bb_setbits(sc, R12A_TXAGC_TABLE_SELECT, 0x80000000, 0); 159 rtwn_bb_setbits(sc, R12A_TXAGC_TABLE_SELECT, 0x80000000, 0); 173 rtwn_bb_setbits(sc, R12A_TXAGC_TABLE_SELECT, 0x80000000, 0); 192 rtwn_bb_setbits(sc, R12A_TXAGC_TABLE_SELECT, 0x80000000, 0); 201 rtwn_bb_setbits(sc, R12A_CCA_ON_SEC, 0x03, 0x0c); 224 rtwn_bb_setbits(sc, R12A_TXAGC_TABLE_SELECT, 0, 0x80000000); 245 rtwn_bb_setbits(sc, R12A_TXAGC_TABLE_SELECT, 0, 0x80000000); 252 rtwn_bb_setbits(sc, 0xc90, 0, 0x00000080); 253 rtwn_bb_setbits(s [all...] |
H A D | r12a_rf.c | 64 rtwn_bb_setbits(sc, R12A_CCA_ON_SEC, 0, 0x08); 69 rtwn_bb_setbits(sc, R12A_HSSI_PARAM2, 77 rtwn_bb_setbits(sc, R12A_CCA_ON_SEC, 0x08, 0); 90 rtwn_bb_setbits(sc, R12A_HSSI_PARAM2,
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H A D | r12a_init.c | 480 rtwn_bb_setbits(sc, R92C_FPGA0_RFPARAM(0), 0, 0x2000);
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/freebsd-current/sys/dev/rtwn/rtl8192c/ |
H A D | r92c_init.c | 151 rtwn_bb_setbits(sc, R92C_FPGA0_TXINFO, 0x03, 0x02); 152 rtwn_bb_setbits(sc, R92C_FPGA1_TXINFO, 0x300033, 0x200022); 153 rtwn_bb_setbits(sc, R92C_CCK0_AFESETTING, 0xff000000, 155 rtwn_bb_setbits(sc, R92C_OFDM0_TRXPATHENA, 0xff, 0x23); 156 rtwn_bb_setbits(sc, R92C_OFDM0_AGCPARAM1, 0x30, 0x10); 158 rtwn_bb_setbits(sc, 0xe74, 0x0c000000, 0x08000000); 159 rtwn_bb_setbits(sc, 0xe78, 0x0c000000, 0x08000000); 160 rtwn_bb_setbits(sc, 0xe7c, 0x0c000000, 0x08000000); 161 rtwn_bb_setbits(sc, 0xe80, 0x0c000000, 0x08000000); 162 rtwn_bb_setbits(s [all...] |
H A D | r92c_chan.c | 252 rtwn_bb_setbits(sc, R92C_FPGA0_RFMOD, 0, R92C_RFMOD_40MHZ); 253 rtwn_bb_setbits(sc, R92C_FPGA1_RFMOD, 0, R92C_RFMOD_40MHZ); 256 rtwn_bb_setbits(sc, R92C_CCK0_SYSTEM, 0x10, 259 rtwn_bb_setbits(sc, R92C_OFDM1_LSTF, 0x0c00, 262 rtwn_bb_setbits(sc, R92C_FPGA0_ANAPARAM2, 265 rtwn_bb_setbits(sc, 0x818, 0x0c000000, (prichlo ? 2 : 1) << 26); 279 rtwn_bb_setbits(sc, R92C_FPGA0_RFMOD, R92C_RFMOD_40MHZ, 0); 280 rtwn_bb_setbits(sc, R92C_FPGA1_RFMOD, R92C_RFMOD_40MHZ, 0); 282 rtwn_bb_setbits(sc, R92C_FPGA0_ANAPARAM2, 0, 316 rtwn_bb_setbits(s [all...] |
H A D | r92c_calib.c | 191 rtwn_bb_setbits(sc, R92C_CCK0_AFESETTING, 0, 0x0f000000); 195 rtwn_bb_setbits(sc, R92C_FPGA0_RFIFACESW(0), 0, 0x04000400); 196 rtwn_bb_setbits(sc, R92C_FPGA0_RFIFACEOE(0), 0x400, 0); 197 rtwn_bb_setbits(sc, R92C_FPGA0_RFIFACEOE(1), 0x400, 0); 345 rtwn_bb_setbits(sc, R92C_OFDM0_TXIQIMBALANCE(chain), 0x3ff, reg); 346 rtwn_bb_setbits(sc, R92C_OFDM0_ECCATHRESHOLD, 0x80000000, 353 rtwn_bb_setbits(sc, R92C_OFDM0_TXAFE(chain), 0xf0000000, 355 rtwn_bb_setbits(sc, R92C_OFDM0_TXIQIMBALANCE(chain), 0x003f0000, 357 rtwn_bb_setbits(sc, R92C_OFDM0_ECCATHRESHOLD, 0x20000000, 363 rtwn_bb_setbits(s [all...] |
/freebsd-current/sys/dev/rtwn/rtl8192e/ |
H A D | r92e_rf.c | 67 rtwn_bb_setbits(sc, R92C_HSSI_PARAM2(0), R92C_HSSI_PARAM2_READ_EDGE, 0); 68 rtwn_bb_setbits(sc, R92C_HSSI_PARAM2(0), 0, R92C_HSSI_PARAM2_READ_EDGE); 82 rtwn_bb_setbits(sc, 0x818, 0x20000, 0); 85 rtwn_bb_setbits(sc, 0x818, 0, 0x20000);
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H A D | r92e_chan.c | 170 rtwn_bb_setbits(sc, R92C_FPGA0_RFMOD, 0, R92C_RFMOD_40MHZ); 171 rtwn_bb_setbits(sc, R92C_FPGA1_RFMOD, 0, R92C_RFMOD_40MHZ); 179 rtwn_bb_setbits(sc, R92C_CCK0_SYSTEM, 182 rtwn_bb_setbits(sc, R92C_OFDM1_LSTF, 0x0c00, (prichlo ? 1 : 2) << 10); 184 rtwn_bb_setbits(sc, R92C_FPGA0_ANAPARAM2, 187 rtwn_bb_setbits(sc, 0x818, 0x0c000000, (prichlo ? 2 : 1) << 26); 198 rtwn_bb_setbits(sc, R92C_FPGA0_RFMOD, R92C_RFMOD_40MHZ, 0); 199 rtwn_bb_setbits(sc, R92C_FPGA1_RFMOD, R92C_RFMOD_40MHZ, 0); 206 rtwn_bb_setbits(sc, R92C_OFDM0_TXPSEUDONOISEWGT, 0xc0000000, 0);
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H A D | r92e_init.c | 178 rtwn_bb_setbits(sc, R92C_FPGA0_RFIFACEOE(chain), 182 rtwn_bb_setbits(sc, R92C_FPGA0_RFIFACEOE(chain), 186 rtwn_bb_setbits(sc, R92C_HSSI_PARAM2(chain), 189 rtwn_bb_setbits(sc, R92C_HSSI_PARAM2(chain), 206 rtwn_bb_setbits(sc, R92C_FPGA0_RFMOD, 0, R92C_RFMOD_CCK_EN); 207 rtwn_bb_setbits(sc, R92C_FPGA0_RFMOD, 0, R92C_RFMOD_OFDM_EN);
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/freebsd-current/sys/dev/rtwn/rtl8188e/ |
H A D | r88e_calib.c | 208 rtwn_bb_setbits(sc, R92C_CCK0_AFESETTING, 0, 0x0f000000); 212 rtwn_bb_setbits(sc, R92C_FPGA0_RFIFACESW(0), 0, 0x04000400); 213 rtwn_bb_setbits(sc, R92C_FPGA0_RFIFACEOE(0), 0x400, 0); 214 rtwn_bb_setbits(sc, R92C_FPGA0_RFIFACEOE(1), 0x400, 0); 324 rtwn_bb_setbits(sc, R92C_OFDM0_TXIQIMBALANCE(0), 0x3ff, reg); 325 rtwn_bb_setbits(sc, R92C_OFDM0_ECCATHRESHOLD, 0x80000000, 332 rtwn_bb_setbits(sc, R92C_OFDM0_TXAFE(0), 0xf0000000, 334 rtwn_bb_setbits(sc, R92C_OFDM0_TXIQIMBALANCE(0), 0x003f0000, 336 rtwn_bb_setbits(sc, R92C_OFDM0_ECCATHRESHOLD, 0x20000000, 342 rtwn_bb_setbits(s [all...] |
H A D | r88e_chan.c | 136 rtwn_bb_setbits(sc, R92C_FPGA0_RFMOD, R92C_RFMOD_40MHZ, 0); 137 rtwn_bb_setbits(sc, R92C_FPGA1_RFMOD, R92C_RFMOD_40MHZ, 0); 148 rtwn_bb_setbits(sc, R92C_OFDM0_AGCCORE1(0),
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/freebsd-current/sys/dev/rtwn/rtl8192c/pci/ |
H A D | r92ce_calib.c | 326 rtwn_bb_setbits(sc, R92C_OFDM0_TXIQIMBALANCE(chain), 0x3ff, reg); 327 rtwn_bb_setbits(sc, R92C_OFDM0_ECCATHRESHOLD, 0x80000000, 334 rtwn_bb_setbits(sc, R92C_OFDM0_TXAFE(chain), 0xf0000000, 336 rtwn_bb_setbits(sc, R92C_OFDM0_TXIQIMBALANCE(chain), 0x003f0000, 338 rtwn_bb_setbits(sc, R92C_OFDM0_ECCATHRESHOLD, 0x20000000, 344 rtwn_bb_setbits(sc, R92C_OFDM0_RXIQIMBALANCE(chain), 0x3ff, 346 rtwn_bb_setbits(sc, R92C_OFDM0_RXIQIMBALANCE(chain), 0xfc00, 350 rtwn_bb_setbits(sc, R92C_OFDM0_RXIQEXTANTA, 0xf0000000, 353 rtwn_bb_setbits(sc, R92C_OFDM0_AGCRSSITABLE, 0xf000,
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/freebsd-current/sys/dev/rtwn/rtl8821a/usb/ |
H A D | r21au_dfs.c | 66 rtwn_bb_setbits(sc, 0x924, 0x00008000, 0); 80 error = rtwn_bb_setbits(sc, 0x924, 0x00008000, 0); 84 return (rtwn_bb_setbits(sc, 0x924, 0, 0x00008000)); 97 RTWN_CHK(rtwn_bb_setbits(sc, 0x814, 0x3fffffff, 0x04cc4d10)); 98 RTWN_CHK(rtwn_bb_setbits(sc, R12A_BW_INDICATION, 0xff, 0x06));
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/freebsd-current/sys/dev/rtwn/ |
H A D | if_rtwnvar.h | 472 #define rtwn_bb_setbits rtwn_setbits_4 macro
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