Searched refs:fpga (Results 1 - 13 of 13) sorted by relevance

/freebsd-current/sys/dev/mlx5/mlx5_fpga/
H A Dmlx5fpga_ipsec.c80 if (!mdev->fpga || !MLX5_CAP_GEN(mdev, fpga))
178 struct mlx5_fpga_device *fdev = mdev->fpga;
238 struct mlx5_fpga_device *fdev = mdev->fpga;
263 struct mlx5_fpga_device *fdev = mdev->fpga;
275 struct mlx5_fpga_device *fdev = mdev->fpga;
323 struct mlx5_fpga_device *fdev = mdev->fpga;
367 struct mlx5_fpga_device *fdev = mdev->fpga;
H A Dmlx5fpga_core.c207 struct mlx5_fpga_device *fdev = mdev->fpga;
335 if (!MLX5_CAP_GEN(mdev, fpga)) {
347 mdev->fpga = fdev;
362 struct mlx5_fpga_device *fdev = mdev->fpga;
419 struct mlx5_fpga_device *fdev = mdev->fpga;
433 mdev->fpga = NULL;
454 struct mlx5_fpga_device *fdev = mdev->fpga;
H A Dmlx5fpga_sdk.c332 mlx5_fpga_info(fdev, "mlx5/fpga - reload started\n");
359 mlx5_fpga_info(fdev, "mlx5/fpga - reload ended\n");
437 mlx5_core_err(mdev, "fpga device start failed %d\n", err);
538 memcpy(fpga_caps, &fdev->mdev->caps.fpga, sizeof(fdev->mdev->caps.fpga));
H A Dmlx5fpga_cmd.c77 return mlx5_core_access_reg(dev, in, sizeof(in), dev->caps.fpga,
/freebsd-current/sys/dev/cxgbe/common/
H A Dt4vf_hw.c369 adapter->params.fpga = 1;
H A Dcommon.h389 unsigned int fpga:1; /* this is an FPGA */ member in struct:adapter_params
542 return adap->params.fpga;
H A Dt4_hw.c9311 adapter->params.fpga = 1;
/freebsd-current/sys/dev/mlx5/
H A Ddevice.h1161 MLX5_GET(fpga_cap, (mdev)->caps.fpga, cap)
1164 MLX5_GET64(fpga_cap, (mdev)->caps.fpga, cap)
H A Ddriver.h706 u32 fpga[MLX5_ST_SZ_DW(fpga_cap)]; member in struct:mlx5_core_dev::__anon50
757 struct mlx5_fpga_device *fpga; member in struct:mlx5_core_dev
H A Dmlx5_ifc.h1249 u8 fpga[0x1]; member in struct:mlx5_ifc_cmd_hca_cap_bits
/freebsd-current/sys/dev/mlx5/mlx5_core/
H A Dmlx5_eq.c562 if (MLX5_CAP_GEN(dev, fpga))
H A Dmlx5_main.c1232 mlx5_core_err(dev, "fpga device start failed %d\n", err);
1669 OID_AUTO, "fpga", CTLFLAG_RD | CTLFLAG_MPSAFE,
1670 &dev->caps.fpga, sizeof(dev->caps.fpga), "IU", "");
/freebsd-current/sys/arm/xilinx/
H A Dzy7_devcfg.c99 SYSCTL_NODE(_hw, OID_AUTO, fpga, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,

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