Searched refs:enableMachineScheduler (Results 1 - 24 of 24) sorted by relevance

/freebsd-current/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetSubtargetInfo.cpp35 bool TargetSubtargetInfo::enableMachineScheduler() const { function in class:TargetSubtargetInfo
40 return enableMachineScheduler();
53 return enableMachineScheduler() && enablePostRAScheduler();
H A DMachineScheduler.cpp420 } else if (!mf.getSubtarget().enableMachineScheduler())
/freebsd-current/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblySubtarget.cpp53 bool WebAssemblySubtarget::enableMachineScheduler() const { function in class:WebAssemblySubtarget
H A DWebAssemblySubtarget.h89 bool enableMachineScheduler() const override;
/freebsd-current/contrib/llvm-project/llvm/lib/Target/VE/
H A DVESubtarget.cpp61 bool VESubtarget::enableMachineScheduler() const { return true; } function in class:VESubtarget
H A DVESubtarget.h63 bool enableMachineScheduler() const override;
/freebsd-current/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiSubtarget.h46 bool enableMachineScheduler() const override { return true; }
/freebsd-current/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcSubtarget.h70 bool enableMachineScheduler() const override;
H A DSparcSubtarget.cpp84 bool SparcSubtarget::enableMachineScheduler() const { function in class:SparcSubtarget
/freebsd-current/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600Subtarget.h127 bool enableMachineScheduler() const override {
H A DGCNSubtarget.h877 bool enableMachineScheduler() const override {
/freebsd-current/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZSubtarget.h90 bool enableMachineScheduler() const override { return true; }
/freebsd-current/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMSubtarget.cpp377 bool ARMSubtarget::enableMachineScheduler() const { function in class:ARMSubtarget
408 if (enableMachineScheduler())
417 if (!enableMachineScheduler())
H A DARMSubtarget.h474 bool enableMachineScheduler() const override;
/freebsd-current/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCSubtarget.h227 bool enableMachineScheduler() const override;
H A DPPCSubtarget.cpp133 bool PPCSubtarget::enableMachineScheduler() const { return true; } function in class:PPCSubtarget
H A DPPCISelLowering.cpp1478 if (Subtarget.enableMachineScheduler())
17402 if (DisableILPPref || Subtarget.enableMachineScheduler())
/freebsd-current/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetSubtargetInfo.h193 virtual bool enableMachineScheduler() const;
/freebsd-current/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVSubtarget.h122 bool enableMachineScheduler() const override { return true; }
/freebsd-current/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64Subtarget.h202 bool enableMachineScheduler() const override { return true; }
/freebsd-current/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonSubtarget.h274 bool enableMachineScheduler() const override;
H A DHexagonSubtarget.cpp532 bool HexagonSubtarget::enableMachineScheduler() const { function in class:HexagonSubtarget
/freebsd-current/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86Subtarget.h429 bool enableMachineScheduler() const override { return true; }
/freebsd-current/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGISel.cpp293 (ST.enableMachineScheduler() && ST.enableMachineSchedDefaultSched()) ||

Completed in 416 milliseconds