1//===-- SparcSubtarget.h - Define Subtarget for the SPARC -------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file declares the SPARC specific subclass of TargetSubtargetInfo.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_SPARC_SPARCSUBTARGET_H
14#define LLVM_LIB_TARGET_SPARC_SPARCSUBTARGET_H
15
16#include "MCTargetDesc/SparcMCTargetDesc.h"
17#include "SparcFrameLowering.h"
18#include "SparcISelLowering.h"
19#include "SparcInstrInfo.h"
20#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
21#include "llvm/CodeGen/TargetSubtargetInfo.h"
22#include "llvm/IR/DataLayout.h"
23#include "llvm/Support/ErrorHandling.h"
24#include "llvm/TargetParser/Triple.h"
25#include <string>
26
27#define GET_SUBTARGETINFO_HEADER
28#include "SparcGenSubtargetInfo.inc"
29
30namespace llvm {
31class StringRef;
32
33class SparcSubtarget : public SparcGenSubtargetInfo {
34  // ReserveRegister[i] - Register #i is not available as a general purpose
35  // register.
36  BitVector ReserveRegister;
37
38  Triple TargetTriple;
39  virtual void anchor();
40
41  bool Is64Bit;
42
43#define GET_SUBTARGETINFO_MACRO(ATTRIBUTE, DEFAULT, GETTER)                    \
44  bool ATTRIBUTE = DEFAULT;
45#include "SparcGenSubtargetInfo.inc"
46
47  SparcInstrInfo InstrInfo;
48  SparcTargetLowering TLInfo;
49  SelectionDAGTargetInfo TSInfo;
50  SparcFrameLowering FrameLowering;
51
52public:
53  SparcSubtarget(const StringRef &CPU, const StringRef &TuneCPU,
54                 const StringRef &FS, const TargetMachine &TM, bool is64bit);
55
56  const SparcInstrInfo *getInstrInfo() const override { return &InstrInfo; }
57  const TargetFrameLowering *getFrameLowering() const override {
58    return &FrameLowering;
59  }
60  const SparcRegisterInfo *getRegisterInfo() const override {
61    return &InstrInfo.getRegisterInfo();
62  }
63  const SparcTargetLowering *getTargetLowering() const override {
64    return &TLInfo;
65  }
66  const SelectionDAGTargetInfo *getSelectionDAGInfo() const override {
67    return &TSInfo;
68  }
69
70  bool enableMachineScheduler() const override;
71
72#define GET_SUBTARGETINFO_MACRO(ATTRIBUTE, DEFAULT, GETTER)                    \
73  bool GETTER() const { return ATTRIBUTE; }
74#include "SparcGenSubtargetInfo.inc"
75
76  /// ParseSubtargetFeatures - Parses features string setting specified
77  /// subtarget options.  Definition of function is auto generated by tblgen.
78  void ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS);
79  SparcSubtarget &initializeSubtargetDependencies(StringRef CPU,
80                                                  StringRef TuneCPU,
81                                                  StringRef FS);
82
83  bool is64Bit() const { return Is64Bit; }
84
85  /// The 64-bit ABI uses biased stack and frame pointers, so the stack frame
86  /// of the current function is the area from [%sp+BIAS] to [%fp+BIAS].
87  int64_t getStackPointerBias() const {
88    return is64Bit() ? 2047 : 0;
89  }
90
91  bool isRegisterReserved(MCPhysReg PhysReg) const {
92    return ReserveRegister[PhysReg];
93  }
94
95  /// Given a actual stack size as determined by FrameInfo, this function
96  /// returns adjusted framesize which includes space for register window
97  /// spills and arguments.
98  int getAdjustedFrameSize(int stackSize) const;
99
100  bool isTargetLinux() const { return TargetTriple.isOSLinux(); }
101};
102
103} // end namespace llvm
104
105#endif
106