Searched refs:InstID (Results 1 - 6 of 6) sorted by relevance
| /freebsd-current/contrib/llvm-project/llvm/lib/Target/DirectX/DXILWriter/ |
| H A D | DXILBitcodeWriter.cpp | 335 bool pushValueAndType(const Value *V, unsigned InstID,
337 void writeOperandBundles(const CallBase &CB, unsigned InstID);
338 void pushValue(const Value *V, unsigned InstID,
340 void pushValueSigned(const Value *V, unsigned InstID,
342 void writeInstruction(const Instruction &I, unsigned InstID,
2211 /// type ID. The value ID that is written is encoded relative to the InstID.
2212 bool DXILBitcodeWriter::pushValueAndType(const Value *V, unsigned InstID, argument
2215 // Make encoding relative to the InstID.
2216 Vals.push_back(InstID - ValID);
2217 if (ValID >= InstID) {
2226 pushValue(const Value *V, unsigned InstID, SmallVectorImpl<unsigned> &Vals) argument
2232 pushValueSigned(const Value *V, unsigned InstID, SmallVectorImpl<uint64_t> &Vals) argument
2240 writeInstruction(const Instruction &I, unsigned InstID, SmallVectorImpl<unsigned> &Vals) argument
2315 pushValue(cast<ShuffleVectorInst>(&I)->getShuffleMaskForBitcode(), InstID, local
[all...] |
| /freebsd-current/contrib/llvm-project/llvm/lib/Bitcode/Writer/ |
| H A D | BitcodeWriter.cpp | 386 bool pushValueAndType(const Value *V, unsigned InstID,
388 void writeOperandBundles(const CallBase &CB, unsigned InstID);
389 void pushValue(const Value *V, unsigned InstID,
391 void pushValueSigned(const Value *V, unsigned InstID,
393 void writeInstruction(const Instruction &I, unsigned InstID,
2819 /// type ID. The value ID that is written is encoded relative to the InstID.
2820 bool ModuleBitcodeWriter::pushValueAndType(const Value *V, unsigned InstID, argument
2823 // Make encoding relative to the InstID.
2824 Vals.push_back(InstID - ValID);
2825 if (ValID >= InstID) {
2832 writeOperandBundles(const CallBase &CS, unsigned InstID) argument
2851 pushValue(const Value *V, unsigned InstID, SmallVectorImpl<unsigned> &Vals) argument
2857 pushValueSigned(const Value *V, unsigned InstID, SmallVectorImpl<uint64_t> &Vals) argument
2865 writeInstruction(const Instruction &I, unsigned InstID, SmallVectorImpl<unsigned> &Vals) argument
3475 unsigned InstID = CstEnd; local
[all...] |
| /freebsd-current/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SIMDInstrOpt.cpp | 224 auto InstID = std::make_pair(InstDesc->getOpcode(), Subtarget); local
225 auto It = SIMDInstrTable.find(InstID);
238 SIMDInstrTable[InstID] = false;
247 SIMDInstrTable[InstID] = false;
259 SIMDInstrTable[InstID] = true;
264 SIMDInstrTable[InstID] = false;
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| /freebsd-current/contrib/llvm-project/llvm/lib/CodeGen/LiveDebugValues/ |
| H A D | InstrRefBasedImpl.h | 934 void writeRegMask(const MachineOperand *MO, unsigned CurBB, unsigned InstID);
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| H A D | InstrRefBasedImpl.cpp | 1080 unsigned InstID) {
1088 defReg(ID, CurBB, InstID);
1090 Masks.push_back(std::make_pair(MO, InstID));
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| /freebsd-current/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | RegisterCoalescer.cpp | 3702 for (unsigned InstID : RegIt->second) {
3703 auto PHIIt = PHIValToPos.find(InstID);
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