/freebsd-current/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | MachineCombiner.cpp | 96 unsigned getDepth(SmallVectorImpl<MachineInstr *> &InsInstrs, 105 SmallVectorImpl<MachineInstr *> &InsInstrs, 110 SmallVectorImpl<MachineInstr *> &InsInstrs, 115 SmallVectorImpl<MachineInstr *> &InsInstrs, 121 SmallVectorImpl<MachineInstr *> &InsInstrs, 203 /// \param InsInstrs is a vector of machine instructions 205 /// of defining machine instruction in \p InsInstrs 208 /// \returns Depth of last instruction in \InsInstrs ("NewRoot") 210 MachineCombiner::getDepth(SmallVectorImpl<MachineInstr *> &InsInstrs, argument 218 for (auto *InstrPtr : InsInstrs) { // fo 333 getLatenciesForInstrSequences( MachineInstr &MI, SmallVectorImpl<MachineInstr *> &InsInstrs, SmallVectorImpl<MachineInstr *> &DelInstrs, MachineTraceMetrics::Trace BlockTrace) argument 352 reduceRegisterPressure( MachineInstr &Root, MachineBasicBlock *MBB, SmallVectorImpl<MachineInstr *> &InsInstrs, SmallVectorImpl<MachineInstr *> &DelInstrs, MachineCombinerPattern Pattern) argument 369 improvesCriticalPathLen( MachineBasicBlock *MBB, MachineInstr *Root, MachineTraceMetrics::Trace BlockTrace, SmallVectorImpl<MachineInstr *> &InsInstrs, SmallVectorImpl<MachineInstr *> &DelInstrs, DenseMap<unsigned, unsigned> &InstrIdxForVirtReg, MachineCombinerPattern Pattern, bool SlackIsAccurate) argument [all...] |
H A D | TargetInstrInfo.cpp | 1059 SmallVectorImpl<MachineInstr *> &InsInstrs, 1162 InsInstrs.push_back(MIB1); 1163 InsInstrs.push_back(MIB2); 1181 SmallVectorImpl<MachineInstr *> &InsInstrs, 1205 reassociateOps(Root, *Prev, Pattern, InsInstrs, DelInstrs, InstIdxForVirtReg); 1056 reassociateOps( MachineInstr &Root, MachineInstr &Prev, MachineCombinerPattern Pattern, SmallVectorImpl<MachineInstr *> &InsInstrs, SmallVectorImpl<MachineInstr *> &DelInstrs, DenseMap<unsigned, unsigned> &InstrIdxForVirtReg) const argument 1179 genAlternativeCodeSequence( MachineInstr &Root, MachineCombinerPattern Pattern, SmallVectorImpl<MachineInstr *> &InsInstrs, SmallVectorImpl<MachineInstr *> &DelInstrs, DenseMap<unsigned, unsigned> &InstIdxForVirtReg) const argument
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64InstrInfo.cpp | 6596 /// \param [out] InsInstrs is a vector of machine instructions and will 6608 SmallVectorImpl<MachineInstr *> &InsInstrs, unsigned IdxMulOpd, 6662 InsInstrs.push_back(MIB); 6669 SmallVectorImpl<MachineInstr *> &InsInstrs) { 6702 InsInstrs.push_back(MIB); 6710 SmallVectorImpl<MachineInstr *> &InsInstrs, 6742 InsInstrs.push_back(MIB); 6752 MachineInstr &Root, SmallVectorImpl<MachineInstr *> &InsInstrs, 6754 return genFusedMultiply(MF, MRI, TII, Root, InsInstrs, IdxMulOpd, MaddOpc, RC, 6762 SmallVectorImpl<MachineInstr *> &InsInstrs, [all...] |
H A D | AArch64InstrInfo.h | 302 SmallVectorImpl<MachineInstr *> &InsInstrs,
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCInstrInfo.h | 228 SmallVectorImpl<MachineInstr *> &InsInstrs, 233 SmallVectorImpl<MachineInstr *> &InsInstrs) const; 354 SmallVectorImpl<MachineInstr *> &InsInstrs, 384 SmallVectorImpl<MachineInstr *> &InsInstrs) const override;
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H A D | PPCInstrInfo.cpp | 528 SmallVectorImpl<MachineInstr *> &InsInstrs) const { 529 assert(!InsInstrs.empty() && "Instructions set to be inserted is empty!"); 575 for (auto *Inst : InsInstrs) { 577 assert(Operand.isReg() && "Invalid instruction in InsInstrs!"); 590 generateLoadForNewConst(ConstPoolIdx, &Root, C->getType(), InsInstrs); 668 SmallVectorImpl<MachineInstr *> &InsInstrs) const { 711 // Insert the toc load instructions into InsInstrs. 712 InsInstrs.insert(InsInstrs.begin(), Load); 713 InsInstrs 755 genAlternativeCodeSequence( MachineInstr &Root, MachineCombinerPattern Pattern, SmallVectorImpl<MachineInstr *> &InsInstrs, SmallVectorImpl<MachineInstr *> &DelInstrs, DenseMap<unsigned, unsigned> &InstrIdxForVirtReg) const argument 775 reassociateFMA( MachineInstr &Root, MachineCombinerPattern Pattern, SmallVectorImpl<MachineInstr *> &InsInstrs, SmallVectorImpl<MachineInstr *> &DelInstrs, DenseMap<unsigned, unsigned> &InstrIdxForVirtReg) const argument [all...] |
/freebsd-current/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVInstrInfo.h | 246 SmallVectorImpl<MachineInstr *> &InsInstrs) const override; 250 SmallVectorImpl<MachineInstr *> &InsInstrs,
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H A D | RISCVInstrInfo.cpp | 1622 SmallVectorImpl<MachineInstr *> &InsInstrs) const { 1626 assert(all_of(InsInstrs, 1638 for (auto *NewMI : InsInstrs) { 1888 SmallVectorImpl<MachineInstr *> &InsInstrs, 1922 InsInstrs.push_back(MIB); 1930 SmallVectorImpl<MachineInstr *> &InsInstrs, 1936 TargetInstrInfo::genAlternativeCodeSequence(Root, Pattern, InsInstrs, 1942 combineFPFusedMultiply(Root, Prev, Pattern, InsInstrs, DelInstrs); 1948 combineFPFusedMultiply(Root, Prev, Pattern, InsInstrs, DelInstrs); 1886 combineFPFusedMultiply(MachineInstr &Root, MachineInstr &Prev, MachineCombinerPattern Pattern, SmallVectorImpl<MachineInstr *> &InsInstrs, SmallVectorImpl<MachineInstr *> &DelInstrs) argument 1928 genAlternativeCodeSequence( MachineInstr &Root, MachineCombinerPattern Pattern, SmallVectorImpl<MachineInstr *> &InsInstrs, SmallVectorImpl<MachineInstr *> &DelInstrs, DenseMap<unsigned, unsigned> &InstrIdxForVirtReg) const argument
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/freebsd-current/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | TargetInstrInfo.h | 1209 SmallVectorImpl<MachineInstr *> &InsInstrs) const {} 1252 /// \param InsInstrs - Vector of new instructions that implement P 1259 SmallVectorImpl<MachineInstr *> &InsInstrs, 1274 SmallVectorImpl<MachineInstr *> &InsInstrs,
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86InstrInfo.h | 663 SmallVectorImpl<MachineInstr *> &InsInstrs,
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H A D | X86InstrInfo.cpp | 10620 SmallVectorImpl<MachineInstr *> &InsInstrs, 10703 InsInstrs.push_back(Madd); 10704 InsInstrs.push_back(Add); 10710 SmallVectorImpl<MachineInstr *> &InsInstrs, 10716 TargetInstrInfo::genAlternativeCodeSequence(Root, Pattern, InsInstrs, 10720 genAlternativeDpCodeSequence(Root, *this, InsInstrs, DelInstrs,
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