Lines Matching refs:InsInstrs
528 SmallVectorImpl<MachineInstr *> &InsInstrs) const {
529 assert(!InsInstrs.empty() && "Instructions set to be inserted is empty!");
575 for (auto *Inst : InsInstrs) {
577 assert(Operand.isReg() && "Invalid instruction in InsInstrs!");
590 generateLoadForNewConst(ConstPoolIdx, &Root, C->getType(), InsInstrs);
668 SmallVectorImpl<MachineInstr *> &InsInstrs) const {
711 // Insert the toc load instructions into InsInstrs.
712 InsInstrs.insert(InsInstrs.begin(), Load);
713 InsInstrs.insert(InsInstrs.begin(), TOCOffset);
757 SmallVectorImpl<MachineInstr *> &InsInstrs,
765 reassociateFMA(Root, Pattern, InsInstrs, DelInstrs, InstrIdxForVirtReg);
769 TargetInstrInfo::genAlternativeCodeSequence(Root, Pattern, InsInstrs,
777 SmallVectorImpl<MachineInstr *> &InsInstrs,
934 InsInstrs.push_back(MINewA);
935 InsInstrs.push_back(MINewB);
936 InsInstrs.push_back(MINewC);
977 InsInstrs.push_back(MINewA);
978 InsInstrs.push_back(MINewB);
979 InsInstrs.push_back(MINewD);
980 InsInstrs.push_back(MINewC);
997 // here as a placeholder. When the InsInstrs is selected in
1020 InsInstrs.push_back(NewARegPressure);
1021 InsInstrs.push_back(NewCRegPressure);
1024 assert(!InsInstrs.empty() &&