Searched refs:Abs (Results 1 - 25 of 28) sorted by relevance

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/freebsd-current/contrib/llvm-project/llvm/lib/DebugInfo/PDB/
H A DUDTLayout.cpp121 uint32_t Abs = LayoutItemBase::tailPadding(); local
125 if (Abs < ChildPadding)
126 Abs = 0;
128 Abs -= ChildPadding;
130 return Abs;
/freebsd-current/contrib/llvm-project/llvm/lib/MC/
H A DMCAssembler.cpp1025 bool Abs = getSubsectionsViaSymbols() local
1028 if (!Abs) {
1126 bool Abs = DF.getAddrDelta().evaluateKnownAbsolute(AddrDelta, Layout); local
1127 assert(Abs && "We created a line delta with an invalid expression");
1128 (void)Abs;
1148 bool Abs = DF.getAddrDelta().evaluateAsAbsolute(Value, Layout); local
1149 if (!Abs) {
1183 bool Abs = PF.getAddrDelta().evaluateKnownAbsolute(AddrDelta, Layout); local
1184 assert(Abs && "We created a pseudo probe with an invalid expression");
1185 (void)Abs;
[all...]
/freebsd-current/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600ISelLowering.h111 SDValue &Neg, SDValue &Abs, SDValue &Sel, SDValue &Imm,
H A DSIPeepholeSDWA.cpp118 bool Abs; member in class:__anon2337::SDWASrcOperand
127 SrcSel(SrcSel_), Abs(Abs_), Neg(Neg_), Sext(Sext_) {}
133 bool getAbs() const { return Abs; }
318 if (Abs || Neg) {
321 Mods |= Abs ? SISrcMods::ABS : 0u;
H A DR600ISelLowering.cpp1946 SDValue &Src, SDValue &Neg, SDValue &Abs,
1961 if (!Abs.getNode())
1964 Abs = DAG.getTargetConstant(1, SDLoc(ParentNode), MVT::i32);
2120 SDValue &Abs = Ops[AbsIdx[i] - 1]; local
2126 if (FoldOperand(Node, i, Src, Neg, Abs, Sel, FakeOp, DAG))
2159 SDValue &Abs = (AbsIdx[i] > -1) ? Ops[AbsIdx[i] - 1] : FakeAbs; local
2169 if (FoldOperand(Node, i, Src, Neg, Abs, Sel, Imm, DAG))
1945 FoldOperand(SDNode *ParentNode, unsigned SrcIdx, SDValue &Src, SDValue &Neg, SDValue &Abs, SDValue &Sel, SDValue &Imm, SelectionDAG &DAG) const argument
H A DAMDGPULegalizerInfo.cpp5036 auto Abs = B.buildFAbs(S32, RHS, Flags);
5043 auto CmpRes = B.buildFCmp(CmpInst::FCMP_OGT, S1, Abs, C0, Flags);
H A DAMDGPUISelLowering.cpp3231 SDValue Abs = local
3234 std::tie(Lo, Hi) = split64BitValue(Abs, DAG);
/freebsd-current/contrib/llvm-project/compiler-rt/lib/sanitizer_common/
H A Dsanitizer_stackdepot.cpp80 Abs(common_flags()->compress_stack_depot)));
H A Dsanitizer_common.h489 constexpr T Abs(T a) { function in namespace:__sanitizer
/freebsd-current/contrib/llvm-project/lld/ELF/
H A DConfig.h91 enum class Target2Policy { Abs, Rel, GotRel }; member in class:lld::elf::Target2Policy
H A DDriver.cpp732 return Target2Policy::Abs;
/freebsd-current/contrib/llvm-project/llvm/lib/CodeGen/
H A DExpandLargeFpConvert.cpp169 Value *Abs = Builder.CreateAnd(ARep, SignificandMask); local
170 Value *Or = Builder.CreateOr(Abs, ImplicitBit);
/freebsd-current/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp75 bool Abs = false; member in struct:__anon2291::AMDGPUOperand::Modifiers
80 bool hasFPModifiers() const { return Abs || Neg; }
86 Operand |= Abs ? SISrcMods::ABS : 0u;
1191 OS << "abs:" << Mods.Abs << " neg: " << Mods.Neg << " sext:" << Mods.Sext;
2129 if (Imm.Mods.Abs) {
3193 bool Abs, SP3Abs; local
3210 Abs = trySkipId("abs");
3211 if (Abs && !skipToken(AsmToken::LParen, "expected left paren after abs"))
3220 if (Abs && SP3Abs)
3230 return (SP3Neg || Neg || SP3Abs || Abs || Li
[all...]
/freebsd-current/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DLegalizerHelper.cpp7823 auto Abs = MIRBuilder.buildAnd(IntTy, AsInt, ValueMaskC);
7825 MIRBuilder.buildICmp(CmpInst::Predicate::ICMP_NE, DstTy, AsInt, Abs);
7837 appendToRes(MIRBuilder.buildICmp(CmpInst::Predicate::ICMP_ULT, DstTy, Abs,
7847 auto Cmp = MIRBuilder.buildICmp(CmpInst::Predicate::ICMP_ULT, DstTy, Abs,
7873 MIRBuilder.buildICmp(CmpInst::Predicate::ICMP_EQ, DstTy, Abs, ZeroC));
7882 auto V = (PartialCheck == fcPosSubnormal) ? AsInt : Abs;
7899 MIRBuilder.buildICmp(CmpInst::Predicate::ICMP_EQ, DstTy, Abs, InfC));
7913 MIRBuilder.buildICmp(CmpInst::Predicate::ICMP_UGT, DstTy, Abs, InfC));
7916 appendToRes(MIRBuilder.buildICmp(CmpInst::Predicate::ICMP_UGE, DstTy, Abs,
7922 MIRBuilder.buildICmp(CmpInst::Predicate::ICMP_UGT, DstTy, Abs, Inf
[all...]
/freebsd-current/contrib/llvm-project/llvm/tools/llvm-nm/
H A Dllvm-nm.cpp1291 bool Abs = ((EFlags & MachO::EXPORT_SYMBOL_FLAGS_KIND_MASK) == local
1298 if (Abs) {
/freebsd-current/contrib/llvm-project/lld/ELF/Arch/
H A DARM.cpp141 if (config->target2 == Target2Policy::Abs)
/freebsd-current/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineCalls.cpp1776 Value *Abs = Builder.CreateBinaryIntrinsic( local
1783 Abs = Builder.CreateNeg(Abs, "nabs", /* NUW */ false, IntMinIsPoison);
1784 return replaceInstUsesWith(CI, Abs);
H A DInstCombineMulDivRem.cpp491 Value *Abs = Builder.CreateBinaryIntrinsic( local
493 Abs->takeName(&I);
494 return replaceInstUsesWith(I, Abs);
H A DInstCombineSelect.cpp1193 Instruction *Abs = local
1197 return IC.Builder.CreateNeg(Abs); // Always without NSW flag!
1198 return Abs;
H A DInstCombineAndOrXor.cpp4798 if (Instruction *Abs = canonicalizeAbs(I, Builder))
4799 return Abs;
/freebsd-current/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp458 unsigned Abs = Float64 ? WebAssembly::ABS_F64 : WebAssembly::ABS_F32; local
505 BuildMI(BB, DL, TII.get(Abs), Tmp0).addReg(InReg);
/freebsd-current/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLoweringHVX.cpp2870 SDValue Abs = Signed ? DAG.getNode(ISD::ABS, dl, InpTy, Op0) : Op0;
2871 SDValue Clz = DAG.getNode(ISD::CTLZ, dl, InpTy, Abs);
2873 SDValue Frac0 = DAG.getNode(ISD::SHL, dl, InpTy, {Abs, NLeft});
/freebsd-current/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp2562 SDValue Abs = DAG.getNode(ISD::AND, dl, AsIntVT, AsInt, SignMask);
2565 DAG.getNode(ISD::ADD, dl, AsIntVT, Abs, NegSmallestNormalizedInt);
2570 DAG.getSetCC(dl, SetCCVT, Abs, SmallestNormalizedInt, ISD::SETULT);
2583 DAG.getNode(ISD::SELECT, dl, AsIntVT, IsDenormal, ExpMaskScaled, Abs);
/freebsd-current/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp2898 SDValue Abs = DAG.getNode(RISCVISD::FABS_VL, DL, ContainerVT, Src, Mask, VL); local
2917 {Abs, MaxValSplat, DAG.getCondCode(ISD::SETOLT),
3008 SDValue Abs = DAG.getNode(RISCVISD::FABS_VL, DL, ContainerVT, Src, Mask, VL); local
3026 {Abs, MaxValSplat, DAG.getCondCode(ISD::SETOLT), Mask, Mask, VL});
11749 SDValue Abs = DAG.getNode(RISCVISD::ABSW, DL, MVT::i64, Src); local
11750 Results.push_back(DAG.getNode(ISD::TRUNCATE, DL, MVT::i32, Abs));
/freebsd-current/contrib/llvm-project/llvm/tools/llvm-objdump/
H A DMachODump.cpp10188 bool Abs = ((Flags & MachO::EXPORT_SYMBOL_FLAGS_KIND_MASK) == local
10197 if (WeakDef || ThreadLocal || Resolver || Abs) {
10204 if (Abs)

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