Searched refs:regval (Results 1 - 25 of 29) sorted by relevance

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/freebsd-9.3-release/sys/dev/ath/ath_hal/ar9002/
H A Dar9285_phy.c46 uint32_t regval; local
48 regval = OS_REG_READ(ah, AR_PHY_MULTICHAIN_GAIN_CTL);
49 antconf->main_lna_conf = (regval & AR_PHY_9285_ANT_DIV_MAIN_LNACONF) >>
51 antconf->alt_lna_conf = (regval & AR_PHY_9285_ANT_DIV_ALT_LNACONF) >>
53 antconf->fast_div_bias = (regval & AR_PHY_9285_FAST_DIV_BIAS) >>
61 uint32_t regval; local
63 regval = OS_REG_READ(ah, AR_PHY_MULTICHAIN_GAIN_CTL);
64 regval &= ~(AR_PHY_9285_ANT_DIV_MAIN_LNACONF |
67 regval |= ((antconf->main_lna_conf << AR_PHY_9285_ANT_DIV_MAIN_LNACONF_S)
69 regval |
[all...]
H A Dar9280_olc.c132 int delta, currPDADC, regval; local
161 regval = AH9280(ah)->originalGain[i] - delta;
162 if (regval < 0)
163 regval = 0;
167 AR_PHY_TX_GAIN, regval);
H A Dar9287_reset.c442 uint32_t regChainOffset, regval; local
528 regval = OS_REG_READ(ah, AR9287_AN_RF2G3_CH0);
529 regval &= ~(AR9287_AN_RF2G3_DB1 |
535 regval |= (SM(pModal->db1, AR9287_AN_RF2G3_DB1) |
542 OS_REG_WRITE(ah, AR9287_AN_RF2G3_CH0, regval);
545 regval = OS_REG_READ(ah, AR9287_AN_RF2G3_CH1);
546 regval &= ~(AR9287_AN_RF2G3_DB1 |
552 regval |= (SM(pModal->db1, AR9287_AN_RF2G3_DB1) |
559 OS_REG_WRITE(ah, AR9287_AN_RF2G3_CH1, regval);
/freebsd-9.3-release/contrib/gdb/gdb/
H A Dppc-sysv-tdep.c115 char regval[MAX_REGISTER_SIZE]; local
118 convert_typed_floating (val, type, regval, regtype);
120 regval);
340 char regval[MAX_REGISTER_SIZE]; local
342 regcache_cooked_read (regcache, FP0_REGNUM + 1, regval);
343 convert_typed_floating (regval, regtype, readbuf, type);
349 char regval[MAX_REGISTER_SIZE]; local
351 convert_typed_floating (writebuf, type, regval, regtype);
352 regcache_cooked_write (regcache, FP0_REGNUM + 1, regval);
385 ULONGEST regval; local
645 char regval[MAX_REGISTER_SIZE]; local
663 char regval[MAX_REGISTER_SIZE]; local
728 char regval[MAX_REGISTER_SIZE]; local
853 char regval[MAX_REGISTER_SIZE]; local
880 ULONGEST regval; local
942 char regval[MAX_REGISTER_SIZE]; local
[all...]
H A Dfindvar.c510 struct value *regval;
512 regval = value_from_register (lookup_pointer_type (type),
514 if (regval == NULL)
516 addr = value_as_address (regval);
539 struct value *regval;
547 regval = value_from_register (lookup_pointer_type (type),
551 if (regval == NULL)
554 addr = value_as_address (regval);
559 regval = value_from_register (type, regno, frame);
561 if (regval
509 struct value *regval; local
538 struct value *regval; local
[all...]
H A Dmips-tdep.c2845 unsigned long regval; local
2848 regval = extract_unsigned_integer (val + low_offset, 4);
2851 float_argreg, phex (regval, 4));
2852 write_register (float_argreg++, regval);
2855 regval = extract_unsigned_integer (val + 4 - low_offset, 4);
2858 float_argreg, phex (regval, 4));
2859 write_register (float_argreg++, regval);
2867 LONGEST regval = extract_unsigned_integer (val, len); local
2870 float_argreg, phex (regval, len));
2871 write_register (float_argreg++, regval);
2956 LONGEST regval = local
3123 LONGEST regval = extract_unsigned_integer (val, len); local
3211 LONGEST regval = local
3482 unsigned long regval; local
3513 LONGEST regval = extract_unsigned_integer (val, len); local
3615 LONGEST regval = extract_signed_integer (val, partial_len); local
3934 unsigned long regval; local
3965 LONGEST regval = extract_unsigned_integer (val, len); local
4067 LONGEST regval = extract_signed_integer (val, partial_len); local
[all...]
H A Docd.c512 CORE_ADDR regval;
515 regval = extract_unsigned_integer (p, reglen);
517 return regval;
508 CORE_ADDR regval; local
H A Darm-tdep.c1266 CORE_ADDR regval = extract_unsigned_integer (val, len); local
1267 if (arm_pc_is_thumb (regval))
1270 store_unsigned_integer (val, len, MAKE_THUMB_ADDR (regval));
1285 CORE_ADDR regval = extract_unsigned_integer (val, partial_len); local
1289 phex (regval, DEPRECATED_REGISTER_SIZE));
1290 regcache_cooked_write_unsigned (regcache, argreg, regval);
/freebsd-9.3-release/sys/powerpc/mpc85xx/
H A Dlbc.c211 uint32_t regval; local
221 regval = 0;
222 regval |= sc->sc_banks[i].pa;
226 regval |= (1 << 11);
229 regval |= (2 << 11);
232 regval |= (3 << 11);
238 regval |= (sc->sc_banks[i].decc << 9);
239 regval |= (sc->sc_banks[i].wp << 8);
240 regval |= (sc->sc_banks[i].msel << 5);
241 regval |
[all...]
/freebsd-9.3-release/sys/dev/ixgbe/
H A Dixgbe_82599.h63 s32 ixgbe_enable_rx_dma_82599(struct ixgbe_hw *hw, u32 regval);
H A Dixgbe_82598.c248 u32 regval; local
259 regval = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
260 regval &= ~IXGBE_DCA_TXCTRL_DESC_WRO_EN;
261 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(i), regval);
266 regval = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
267 regval &= ~(IXGBE_DCA_RXCTRL_DATA_WRO_EN |
269 IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(i), regval);
1351 u32 regval; local
1359 regval = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
1360 regval |
[all...]
H A Dixgbe_common.c427 u32 regval; local
438 regval = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(i));
439 regval &= ~IXGBE_DCA_TXCTRL_DESC_WRO_EN;
440 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(i), regval);
444 regval = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
445 regval &= ~(IXGBE_DCA_RXCTRL_DATA_WRO_EN |
447 IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(i), regval);
3283 * @regval: register value to write to RXCTRL
3287 s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval) argument
3291 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, regval);
4263 u32 regval; local
[all...]
H A Dixgbe_common.h109 s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval);
H A Dixgbe_api.c1140 * @regval: bitfield to write to the Rx DMA register
1144 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval) argument
1147 (hw, regval), IXGBE_NOT_IMPLEMENTED);
H A Dixgbe_api.h136 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval);
/freebsd-9.3-release/sys/mips/rmi/dev/xlr/
H A Drge.c632 uint32_t regval; local
636 regval = xlr_read_reg(priv->mmio, R_TX_CONTROL);
637 regval |= (1 << O_TX_CONTROL__TxEnable) |
640 xlr_write_reg(priv->mmio, R_TX_CONTROL, regval);
642 regval = xlr_read_reg(priv->mmio, R_RX_CONTROL);
643 regval |= 1 << O_RX_CONTROL__RxEnable;
645 regval |= 1 << O_RX_CONTROL__RGMII;
646 xlr_write_reg(priv->mmio, R_RX_CONTROL, regval);
648 regval = xlr_read_reg(priv->mmio, R_MAC_CONFIG_1);
649 regval |
839 rge_mii_write_internal(xlr_reg_t * mii_mmio, int phyaddr, int regidx, int regval) argument
859 rge_mii_write(device_t dev, int phyaddr, int regidx, int regval) argument
1366 uint32_t regval; local
[all...]
/freebsd-9.3-release/sys/dev/cxgb/common/
H A Dcxgb_vsc8211.c396 unsigned int regval; local
420 regval = V_VSC8211_TXFIFODEPTH(val) | V_VSC8211_RXFIFODEPTH(val) |
424 return mdio_write(phy, 0, VSC8211_PHY_CTRL, regval);
/freebsd-9.3-release/sys/dev/ct/
H A Dbshw_machdep.c627 u_int8_t regval; local
629 if ((regval = ct_cr_read_1(chp, 0x37)) & 0x08)
632 ct_cr_write_1(chp, 0x37, regval | 0x08);
633 regval = ct_cr_read_1(chp, 0x3f);
634 ct_cr_write_1(chp, 0x3f, regval | 0x08);
/freebsd-9.3-release/sys/dev/amd/
H A Damd.c139 static void amd_EnDisableCE(struct amd_softc *amd, int mode, int *regval);
140 static void amd_EEpromOutDI(struct amd_softc *amd, int *regval, int Carry);
141 static void amd_Prepare(struct amd_softc *amd, int *regval, u_int8_t EEpromCmd);
2129 amd_EnDisableCE(struct amd_softc *amd, int mode, int *regval) argument
2132 *regval = 0xc0;
2134 *regval = 0x80;
2136 pci_write_config(amd->dev, *regval, 0, /*bytes*/1);
2138 pci_write_config(amd->dev, *regval, 0, /*bytes*/1);
2144 amd_EEpromOutDI(struct amd_softc *amd, int *regval, int Carry) argument
2151 *regval
2191 amd_Prepare(struct amd_softc *amd, int *regval, u_int8_t EEpromCmd) argument
2208 int regval; local
[all...]
/freebsd-9.3-release/contrib/binutils/opcodes/
H A Darc-dis.c1130 _coreRegName(void * arg ATTRIBUTE_UNUSED, int regval) argument
1132 return arcExtMap_coreRegName (regval);
1138 _auxRegName(void *_this ATTRIBUTE_UNUSED, int regval) argument
1140 return arcExtMap_auxRegName(regval);
1146 _condCodeName(void *_this ATTRIBUTE_UNUSED, int regval) argument
1148 return arcExtMap_condCodeName(regval);
/freebsd-9.3-release/sys/dev/e1000/
H A De1000_ich8lan.c143 u16 regval; member in union:ich8_hws_flash_status
156 u16 regval; member in union:ich8_hws_flash_ctrl
167 u16 regval; member in union:ich8_hws_flash_regacc
2954 hsfsts.regval = E1000_READ_FLASH_REG16(hw, ICH_FLASH_HSFSTS);
2966 E1000_WRITE_FLASH_REG16(hw, ICH_FLASH_HSFSTS, hsfsts.regval);
2982 E1000_WRITE_FLASH_REG16(hw, ICH_FLASH_HSFSTS, hsfsts.regval);
2991 hsfsts.regval = E1000_READ_FLASH_REG16(hw,
3005 hsfsts.regval);
3030 hsflctl.regval = E1000_READ_FLASH_REG16(hw, ICH_FLASH_HSFCTL);
3032 E1000_WRITE_FLASH_REG16(hw, ICH_FLASH_HSFCTL, hsflctl.regval);
[all...]
H A Dif_lem.c4590 u32 regval; local
4610 regval = E1000_READ_OFFSET(&adapter->hw, info->offset);
4611 regval = (regval & ~0xffff) | (ticks & 0xffff);
4620 regval++;
4625 E1000_WRITE_OFFSET(&adapter->hw, info->offset, regval);
/freebsd-9.3-release/sys/mips/rmi/dev/nlge/
H A Dif_nlge.c189 int regidx, int regval);
832 nlge_mii_write(struct device *dev, int phyaddr, int regidx, int regval) argument
838 nlge_mii_write_internal(sc->mii_base, phyaddr, regidx, regval);
1574 uint32_t regval; local
1576 regval = NLGE_READ(sc->base, R_MAC_FILTER_CONFIG);
1579 regval |= (1 << O_MAC_FILTER_CONFIG__BROADCAST_EN) |
1584 regval &= ~((1 << O_MAC_FILTER_CONFIG__PAUSE_FRAME_EN) |
1588 NLGE_WRITE(sc->base, R_MAC_FILTER_CONFIG, regval);
1973 * regval - data to write to register
1980 int regval)
1979 nlge_mii_write_internal(xlr_reg_t *mii_base, int phyaddr, int regidx, int regval) argument
[all...]
/freebsd-9.3-release/sys/dev/hatm/
H A Dif_hatm.c1602 uint32_t regval; local
1609 regval = READ4(sc, HE_REGO_SUNI + 4 * reg);
1610 regval = (regval & ~mask) | (val & mask);
1611 WRITE4(sc, HE_REGO_SUNI + 4 * reg, regval);
/freebsd-9.3-release/sys/dev/sound/isa/
H A Dmss.c371 change_bits(mixer_tab *t, u_char *regval, int dev, int chn, int newval) argument
378 dev, chn, newval, *regval,
389 *regval &= ~(mask << shift); /* Filter out the previous value */
390 *regval |= (newval & mask) << shift; /* Set the new value */

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