History log of /freebsd-9.3-release/sys/dev/ath/ath_hal/ar9002/ar9287_reset.c
Revision Date Author Comments
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# 267654 19-Jun-2014 gjb

Copy stable/9 to releng/9.3 as part of the 9.3-RELEASE cycle.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation

# 225736 22-Sep-2011 kensmith

Copy head to stable/9 as part of 9.0-RELEASE release cycle.

Approved by: re (implicit)


# 222424 28-May-2011 adrian

Fix AR9287 operation when >1 TX chain is enabled.

I didn't pick this up with the initial commit because I was only testing
with 11bg.


# 222316 26-May-2011 adrian

Remove the three-chain scaled power check for the AR9287 - it isn't
needed.


# 222312 26-May-2011 adrian

Bring over the AR5416 per-rate TX power code, modified to use the
AR9287 EEPROM layout.

The AR9287 only supports 2ghz, so I've removed the 5ghz code (but left
the 5ghz edge flags in there for now) and hard-coded the 2ghz-only
path.

Whilst I'm there, fix a typo (ar9285->ar9287.)

This meets basic TX throughput testing - iperf TX tests == 27-28mbit in 11g,
matching the rest of my 11g kit.


# 222310 26-May-2011 adrian

Flesh out ar9287SetTransmitPower() based on the AR9285 routine.

Hard-code the per-rate TX power at 5dBm for now so testing can be done.

This passes initial TX testing in 11g mode (but, obviously, at 5dBm.)


# 222308 26-May-2011 adrian

Flesh out the TX power calibration for the AR9287.

I'm assuming for now that the AR9287 is only open-loop TX power control
(as mine is) so I've hard-coded the attach path to fail if the NIC is
not open-loop.

This greatly simplifies the TX calibration path and the amount of code
which needs to be ported over.

This still isn't complete - the rate calculation code still needs to be
ported and it all needs to be glued together.

Obtained from: Linux ath9k


# 222301 26-May-2011 adrian

Bring over my AR9287 work in progress.

It isn't linked into the build because it's missing the TX power
and PDADC programming code.

This code is mostly based on the ath9k codebase, compared against
the Atheros codebase as appropriate.

What's implemented:

* probe/attach
* EEPROM board value programming
* RX initial calibration
* radio channel programming
* general MAC / baseband setup
* async fifo setup
* open-loop tx power calibration

What's missing before it can be enabled by default:

* TX power / calibration setting code
* closed-loop tx power calibration routines
* TSF2 handling
* generic timer support from ath9k

Obtained from: Atheros, ath9k