Searched refs:reg_offset (Results 1 - 23 of 23) sorted by relevance

/freebsd-9.3-release/contrib/gdb/gdb/
H A Damd64-nat.c58 int *reg_offset = amd64_native_gregset64_reg_offset; local
65 reg_offset = amd64_native_gregset32_reg_offset;
73 return reg_offset[regnum];
H A Dia64-fbsd-tdep.c39 static int reg_offset[462] = { variable
109 ofs = reg_offset[regno];
133 ofs = reg_offset[regno];
138 IA64_BSP_REGNUM in the reg_offset array above is that of the
142 bsp += *((uint64_t*)((char *)regs + reg_offset[IA64_BSPSTORE_REGNUM]));
H A Damd64fbsd-nat.c56 /* At reg_offset[REGNUM] you'll find the offset to the gregset_t
59 static int reg_offset[] =
162 amd64_native_gregset64_reg_offset = reg_offset;
58 static int reg_offset[] = variable
H A Di386bsd-nat.c68 /* At reg_offset[REGNO] you'll find the offset to the gregset_t
71 static int reg_offset[] =
99 #define REG_ADDR(regset, regno) ((char *) (regset) + reg_offset[regno])
116 return (reg_offset[regno] == -1);
70 static int reg_offset[] = variable
H A Dmips-tdep.c294 int reg_offset = 0; local
301 reg_offset = register_size (current_gdbarch, reg_num) - length;
304 reg_offset = 0;
307 reg_offset = 0;
315 reg_num, reg_offset, buf_offset, length);
324 regcache_cooked_read_part (regcache, reg_num, reg_offset, length,
327 regcache_cooked_write_part (regcache, reg_num, reg_offset, length,
1498 long reg_offset; local
1518 reg_offset = PROC_REG_OFFSET (proc_desc);
1573 CORE_ADDR reg_position = (cache->base + reg_offset);
2594 int reg_offset; member in struct:return_value_word
[all...]
H A Di386gnu-nat.c51 static int reg_offset[] = variable
59 #define REG_ADDR(state, regnum) ((char *)(state) + reg_offset[regnum])
H A Dvalops.c656 int reg_offset; local
665 for (reg_offset = value_reg, offset = 0;
666 offset + DEPRECATED_REGISTER_RAW_SIZE (reg_offset) <= VALUE_OFFSET (toval);
667 reg_offset++);
682 for (regno = reg_offset, amount_copied = 0;
699 for (regno = reg_offset, amount_copied = 0;
/freebsd-9.3-release/sys/dev/drm2/i915/
H A Dintel_iic.c233 int error, i, reg_offset, unit; local
247 reg_offset = HAS_PCH_SPLIT(dev_priv->dev) ? PCH_GMBUS0 - GMBUS0 : 0;
249 I915_WRITE(GMBUS0 + reg_offset, sc->reg0);
256 I915_WRITE(GMBUS1 + reg_offset, GMBUS_CYCLE_WAIT |
261 POSTING_READ(GMBUS2 + reg_offset);
266 (I915_READ(GMBUS2 + reg_offset) &
270 if ((I915_READ(GMBUS2 + reg_offset) &
274 val = I915_READ(GMBUS3 + reg_offset);
286 I915_WRITE(GMBUS3 + reg_offset, val);
287 I915_WRITE(GMBUS1 + reg_offset, GMBUS_CYCLE_WAI
[all...]
/freebsd-9.3-release/contrib/gcc/
H A Dpostreload.c1164 reg_offset[n] / reg_base_reg[n] / reg_mode[n] are only valid if
1169 reg_offset[n] in mode reg_mode[n] .
1171 sum of reg_offset[n] and the value of register reg_base_reg[n] variable
1173 static HOST_WIDE_INT reg_offset[FIRST_PSEUDO_REGISTER];
1183 invalidate all previously collected reg_offset data. */
1250 rtx new_src = gen_int_mode (INTVAL (src) - reg_offset[regno],
1264 if (INTVAL (src) == reg_offset [regno])
1282 && ((reg_offset[regno]
1304 reg_offset[regno] = INTVAL (src);
1336 HOST_WIDE_INT base_offset = reg_offset[REGN
[all...]
H A Dlocal-alloc.c218 static char *reg_offset;
327 reg_offset[regno] = 0;
382 reg_offset = XNEWVEC (char, max_regno);
447 free (reg_offset);
1737 reg_renumber[i] = qty[q].phys_reg + reg_offset[i];
2033 reg_offset[sreg] = reg_offset[ureg] + offset;
2051 reg_offset[i] -= offset;
217 static char *reg_offset; variable
/freebsd-9.3-release/sys/dev/drm2/radeon/
H A Dni.c1233 u32 reg_offset, wb_offset; local
1245 reg_offset = DMA0_REGISTER_OFFSET;
1249 reg_offset = DMA1_REGISTER_OFFSET;
1253 WREG32(DMA_SEM_INCOMPLETE_TIMER_CNTL + reg_offset, 0);
1254 WREG32(DMA_SEM_WAIT_FAIL_TIMER_CNTL + reg_offset, 0);
1262 WREG32(DMA_RB_CNTL + reg_offset, rb_cntl);
1265 WREG32(DMA_RB_RPTR + reg_offset, 0);
1266 WREG32(DMA_RB_WPTR + reg_offset, 0);
1269 WREG32(DMA_RB_RPTR_ADDR_HI + reg_offset,
1271 WREG32(DMA_RB_RPTR_ADDR_LO + reg_offset,
[all...]
H A Dsi.c898 u32 reg_offset, gb_tile_moden, split_equal_to_row_size; local
915 for (reg_offset = 0; reg_offset < num_tile_mode_states; reg_offset++) {
916 switch (reg_offset) {
1151 WREG32(GB_TILE_MODE0 + (reg_offset * 4), gb_tile_moden);
1154 for (reg_offset = 0; reg_offset < num_tile_mode_states; reg_offset++) {
1155 switch (reg_offset) {
[all...]
/freebsd-9.3-release/sys/dev/ieee488/
H A Dupd7210.h53 u_int reg_offset[8]; member in struct:upd7210
H A Dupd7210.c76 r = bus_read_1(u->reg_res[reg], u->reg_offset[reg]);
85 bus_write_1(u->reg_res[reg], u->reg_offset[reg], val);
H A Dpcii.c238 sc->upd7210.reg_offset[rid] = 0;
H A Dtnt4882.c272 sc->upd7210.reg_offset[i] = i * 2;
/freebsd-9.3-release/sys/dev/ixgbe/
H A Dixgbe_mbx.c588 u32 reg_offset = (vf_number < 32) ? 0 : 1; local
597 vflre = IXGBE_READ_REG(hw, IXGBE_VFLRE(reg_offset));
600 vflre = IXGBE_READ_REG(hw, IXGBE_VFLREC(reg_offset));
608 IXGBE_WRITE_REG(hw, IXGBE_VFLREC(reg_offset), (1 << vf_shift));
/freebsd-9.3-release/contrib/gcc/config/mips/
H A Dmips.c480 unsigned int reg_offset; member in struct:mips_arg_info
3790 info->reg_offset = (mips_abi == ABI_EABI && info->fpr_p
3796 info->reg_offset += info->reg_offset & 1;
3803 max_regs = MAX_ARGS_IN_REGISTERS - info->reg_offset;
3831 cum->num_gprs = info.reg_offset + info.reg_words;
3865 if (info.reg_offset == MAX_ARGS_IN_REGISTERS)
3918 reg = gen_rtx_REG (DFmode, FP_ARG_FIRST + info.reg_offset + i);
3920 reg = gen_rtx_REG (DImode, GP_ARG_FIRST + info.reg_offset + i);
3944 reg = FP_ARG_FIRST + info.reg_offset;
[all...]
/freebsd-9.3-release/sys/dev/bxe/
H A Dbxe.c8351 int reg_offset; local
8424 reg_offset = (port ? MISC_REG_AEU_ENABLE1_FUNC_1_OUT_2 :
8427 val = REG_RD(sc, reg_offset);
8429 REG_WR(sc, reg_offset, val);
8442 int reg_offset; local
8455 reg_offset = (port ? MISC_REG_AEU_ENABLE1_FUNC_1_OUT_1 :
8458 val = REG_RD(sc, reg_offset);
8460 REG_WR(sc, reg_offset, val);
8473 int reg_offset; local
8476 reg_offset
10192 int reg_offset, reg_offset_en5; local
[all...]
H A Decore_sp.c852 uint32_t reg_offset = ECORE_PORT_ID(sc) ? NIG_REG_LLH1_FUNC_MEM : local
866 reg_offset += 8*index;
872 ECORE_REG_WR_DMAE_LEN(sc, reg_offset, wb_data, 2);
/freebsd-9.3-release/contrib/binutils/gas/config/
H A Dtc-score.c163 unsigned long reg_offset; member in struct:proc
5899 cur_proc_ptr->reg_offset = off;
6001 cur_proc_ptr->reg_offset = 0xdeadbeaf;
6124 (cur_proc_ptr->reg_offset == 0xdeadbeaf) ||
6141 md_number_to_chars (fragp + 4, (valueT) cur_proc_ptr->reg_offset, 4);
H A Dtc-mips.c14680 unsigned long reg_offset;
14915 md_number_to_chars (fragp + 4, cur_proc_ptr->reg_offset, 4);
15055 cur_proc_ptr->reg_offset = off;
14667 unsigned long reg_offset; member in struct:proc
/freebsd-9.3-release/contrib/gcc/config/arm/
H A Darm.c14244 int reg_offset = REGNO (offset);
14251 reg_dest + 1, reg_base, reg_offset);
14222 int reg_offset = REGNO (offset); local

Completed in 407 milliseconds