Searched refs:modesIndex (Results 1 - 18 of 18) sorted by relevance

/freebsd-9.3-release/sys/dev/ath/ath_hal/ar9002/
H A Dar9287_attach.c373 u_int modesIndex, freqIndex; local
381 modesIndex = 3;
383 modesIndex = 5;
385 modesIndex = 4;
390 modesIndex = 2;
392 modesIndex = 1;
399 regWrites = ath_hal_ini_write(ah, &AH5212(ah)->ah_ini_modes, modesIndex, regWrites);
400 regWrites = ath_hal_ini_write(ah, &AH9287(ah)->ah_ini_rxgain, modesIndex, regWrites);
401 regWrites = ath_hal_ini_write(ah, &AH9287(ah)->ah_ini_txgain, modesIndex, regWrites);
H A Dar9285_attach.c366 u_int modesIndex, freqIndex; local
373 modesIndex = 3;
375 modesIndex = 5;
377 modesIndex = 4;
383 modesIndex, regWrites);
386 modesIndex, regWrites);
H A Dar9280_attach.c419 u_int modesIndex, freqIndex; local
429 modesIndex = 3;
431 modesIndex = 5;
433 modesIndex = 4;
438 modesIndex = 2;
440 modesIndex = 1;
455 modesIndex, regWrites);
457 HALASSERT(modesIndex < ia->cols);
460 uint32_t val = HAL_INI_VAL(ia, i, modesIndex);
476 modesIndex, regWrite
[all...]
H A Dar9280.c46 ar9280WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, argument
169 uint16_t modesIndex, uint16_t *rfXpdGain)
168 ar9280SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan, uint16_t modesIndex, uint16_t *rfXpdGain) argument
H A Dar9287.c46 ar9287WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, argument
175 uint16_t modesIndex, uint16_t *rfXpdGain)
174 ar9287SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan, uint16_t modesIndex, uint16_t *rfXpdGain) argument
/freebsd-9.3-release/sys/dev/ath/ath_hal/ar5212/
H A Dar5111.c63 ar5111WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, argument
66 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_5111, modesIndex, writes);
219 uint16_t modesIndex, uint16_t *rfXpdGain)
229 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n",
230 __func__, chan->ic_freq, chan->ic_flags, modesIndex);
292 rfReg[i] = ar5212Bank0_5111[i][modesIndex];
303 HAL_INI_WRITE_ARRAY(ah, ar5212Bank2_5111, modesIndex, regWrites);
306 HAL_INI_WRITE_ARRAY(ah, ar5212Bank3_5111, modesIndex, regWrites);
310 rfReg[i] = ar5212Bank6_5111[i][modesIndex];
324 rfReg[i] = ar5212Bank7_5111[i][modesIndex];
218 ar5111SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan, uint16_t modesIndex, uint16_t *rfXpdGain) argument
[all...]
H A Dar2316.c68 ar2316WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, argument
73 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_2316, modesIndex, regWrites);
166 uint16_t modesIndex, uint16_t *rfXpdGain)
179 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n",
180 __func__, chan->ic_freq, chan->ic_flags, modesIndex);
197 RF_BANK_SETUP(priv, 2, modesIndex);
200 RF_BANK_SETUP(priv, 3, modesIndex);
203 RF_BANK_SETUP(priv, 6, modesIndex);
209 RF_BANK_SETUP(priv, 7, modesIndex);
165 ar2316SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan, uint16_t modesIndex, uint16_t *rfXpdGain) argument
H A Dar2317.c68 ar2317WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, argument
71 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_2317, modesIndex, writes);
144 uint16_t modesIndex, uint16_t *rfXpdGain)
157 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n",
158 __func__, chan->ic_freq, chan->ic_flags, modesIndex);
175 RF_BANK_SETUP(priv, 2, modesIndex);
178 RF_BANK_SETUP(priv, 3, modesIndex);
181 RF_BANK_SETUP(priv, 6, modesIndex);
187 RF_BANK_SETUP(priv, 7, modesIndex);
142 ar2317SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan, uint16_t modesIndex, uint16_t *rfXpdGain) argument
H A Dar2413.c64 ar2413WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, argument
67 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_2413, modesIndex, writes);
160 uint16_t modesIndex, uint16_t *rfXpdGain)
173 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n",
174 __func__, chan->ic_freq, chan->ic_flags, modesIndex);
191 RF_BANK_SETUP(priv, 2, modesIndex);
194 RF_BANK_SETUP(priv, 3, modesIndex);
197 RF_BANK_SETUP(priv, 6, modesIndex);
203 RF_BANK_SETUP(priv, 7, modesIndex);
158 ar2413SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan, uint16_t modesIndex, uint16_t *rfXpdGain) argument
H A Dar2425.c52 ar2425WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, argument
55 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_2425, modesIndex, writes);
154 uint16_t modesIndex, uint16_t *rfXpdGain)
167 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n",
168 __func__, chan->ic_freq, chan->ic_flags, modesIndex);
185 RF_BANK_SETUP(priv, 2, modesIndex);
188 RF_BANK_SETUP(priv, 3, modesIndex);
191 RF_BANK_SETUP(priv, 6, modesIndex);
197 RF_BANK_SETUP(priv, 7, modesIndex);
152 ar2425SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan, uint16_t modesIndex, uint16_t *rfXpdGain) argument
H A Dar5112.c64 ar5112WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, argument
67 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_5112, modesIndex, writes);
180 uint16_t modesIndex, uint16_t *rfXpdGain)
199 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n",
200 __func__, chan->ic_freq, chan->ic_flags, modesIndex);
246 RF_BANK_SETUP(priv, 2, modesIndex);
249 RF_BANK_SETUP(priv, 3, modesIndex);
252 RF_BANK_SETUP(priv, 6, modesIndex);
302 RF_BANK_SETUP(priv, 7, modesIndex);
178 ar5112SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan, uint16_t modesIndex, uint16_t *rfXpdGain) argument
H A Dar5413.c64 ar5413WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, argument
67 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_5413, modesIndex, writes);
159 uint16_t modesIndex, uint16_t *rfXpdGain)
174 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n",
175 __func__, chan->ic_freq, chan->ic_flags, modesIndex);
217 RF_BANK_SETUP(priv, 2, modesIndex);
220 RF_BANK_SETUP(priv, 3, modesIndex);
223 RF_BANK_SETUP(priv, 6, modesIndex);
246 RF_BANK_SETUP(priv, 7, modesIndex);
157 ar5413SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan, uint16_t modesIndex, uint16_t *rfXpdGain) argument
H A Dar5212_reset.c121 u_int modesIndex, freqIndex; local
253 modesIndex = 5;
255 modesIndex = 4;
257 modesIndex = 3;
267 modesIndex = 2;
269 modesIndex = 1;
283 regWrites = ath_hal_ini_write(ah, &ahp->ah_ini_modes, modesIndex, 0);
294 ahp->ah_rfHal->writeRegs(ah, modesIndex, freqIndex, regWrites);
382 if (!ahp->ah_rfHal->setRfRegs(ah, chan, modesIndex, rfXpdGain)) {
H A Dar5212.h140 const struct ieee80211_channel *, uint16_t modesIndex,
/freebsd-9.3-release/sys/dev/ath/ath_hal/ar5312/
H A Dar5312_reset.c102 u_int modesIndex, freqIndex; local
215 modesIndex = IEEE80211_IS_CHAN_108G(chan) ? 5 :
219 modesIndex = IEEE80211_IS_CHAN_ST(chan) ? 2 : 1;
227 regWrites = ath_hal_ini_write(ah, &ahp->ah_ini_modes, modesIndex, 0);
230 ahp->ah_rfHal->writeRegs(ah, modesIndex, freqIndex, regWrites);
318 if (!ahp->ah_rfHal->setRfRegs(ah, chan, modesIndex, rfXpdGain)) {
/freebsd-9.3-release/sys/dev/ath/ath_hal/ar5416/
H A Dar5416_attach.c474 u_int modesIndex, freqIndex; local
482 modesIndex = 3;
484 modesIndex = 5;
486 modesIndex = 4;
491 modesIndex = 2;
493 modesIndex = 1;
513 modesIndex, regWrites);
518 AH5212(ah)->ah_rfHal->writeRegs(ah, modesIndex, freqIndex, regWrites);
H A Dar2133.c53 ar2133WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, argument
230 uint16_t modesIndex, uint16_t *rfXpdGain)
247 ath_hal_ini_bank_setup(priv->Bank3Data, &AH5416(ah)->ah_ini_bank3, modesIndex);
250 ath_hal_ini_bank_setup(priv->Bank6Data, &AH5416(ah)->ah_ini_bank6, modesIndex);
229 ar2133SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan, uint16_t modesIndex, uint16_t *rfXpdGain) argument
/freebsd-9.3-release/sys/dev/ath/ath_hal/ar5211/
H A Dar5211_reset.c170 uint16_t modesIndex = 0, freqIndex = 0; local
258 modesIndex = 2;
260 modesIndex = 1;
270 modesIndex = 3;
272 modesIndex = 4;
322 OS_REG_WRITE(ah, ar5211Modes[i][0], ar5211Modes[i][modesIndex]);

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