1185377Ssam/* 2187831Ssam * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 3185377Ssam * Copyright (c) 2002-2008 Atheros Communications, Inc. 4185377Ssam * 5185377Ssam * Permission to use, copy, modify, and/or distribute this software for any 6185377Ssam * purpose with or without fee is hereby granted, provided that the above 7185377Ssam * copyright notice and this permission notice appear in all copies. 8185377Ssam * 9185377Ssam * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10185377Ssam * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11185377Ssam * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12185377Ssam * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13185377Ssam * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14185377Ssam * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15185377Ssam * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16185377Ssam * 17186016Ssam * $FreeBSD$ 18185377Ssam */ 19185377Ssam#include "opt_ah.h" 20185377Ssam 21185377Ssam#include "ah.h" 22185377Ssam#include "ah_internal.h" 23185377Ssam 24185377Ssam#include "ah_eeprom_v3.h" 25185377Ssam 26185377Ssam#include "ar5212/ar5212.h" 27185377Ssam#include "ar5212/ar5212reg.h" 28185377Ssam#include "ar5212/ar5212phy.h" 29185377Ssam 30185377Ssam#define AH_5212_5111 31185377Ssam#include "ar5212/ar5212.ini" 32185377Ssam 33185377Ssam#define N(a) (sizeof(a)/sizeof(a[0])) 34185377Ssam 35185377Ssamstruct ar5111State { 36185377Ssam RF_HAL_FUNCS base; /* public state, must be first */ 37185377Ssam uint16_t pcdacTable[PWR_TABLE_SIZE]; 38185377Ssam 39185377Ssam uint32_t Bank0Data[N(ar5212Bank0_5111)]; 40185377Ssam uint32_t Bank1Data[N(ar5212Bank1_5111)]; 41185377Ssam uint32_t Bank2Data[N(ar5212Bank2_5111)]; 42185377Ssam uint32_t Bank3Data[N(ar5212Bank3_5111)]; 43185377Ssam uint32_t Bank6Data[N(ar5212Bank6_5111)]; 44185377Ssam uint32_t Bank7Data[N(ar5212Bank7_5111)]; 45185377Ssam}; 46185377Ssam#define AR5111(ah) ((struct ar5111State *) AH5212(ah)->ah_rfHal) 47185377Ssam 48185377Ssamstatic uint16_t ar5212GetScaledPower(uint16_t channel, uint16_t pcdacValue, 49185377Ssam const PCDACS_EEPROM *pSrcStruct); 50185377Ssamstatic HAL_BOOL ar5212FindValueInList(uint16_t channel, uint16_t pcdacValue, 51185377Ssam const PCDACS_EEPROM *pSrcStruct, uint16_t *powerValue); 52185377Ssamstatic void ar5212GetLowerUpperPcdacs(uint16_t pcdac, uint16_t channel, 53185377Ssam const PCDACS_EEPROM *pSrcStruct, 54185377Ssam uint16_t *pLowerPcdac, uint16_t *pUpperPcdac); 55185377Ssam 56185377Ssamextern void ar5212GetLowerUpperValues(uint16_t value, 57185377Ssam const uint16_t *pList, uint16_t listSize, 58185377Ssam uint16_t *pLowerValue, uint16_t *pUpperValue); 59185377Ssamextern void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32, 60185377Ssam uint32_t numBits, uint32_t firstBit, uint32_t column); 61185377Ssam 62185377Ssamstatic void 63185377Ssamar5111WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, 64185377Ssam int writes) 65185377Ssam{ 66185377Ssam HAL_INI_WRITE_ARRAY(ah, ar5212Modes_5111, modesIndex, writes); 67185377Ssam HAL_INI_WRITE_ARRAY(ah, ar5212Common_5111, 1, writes); 68185377Ssam HAL_INI_WRITE_ARRAY(ah, ar5212BB_RfGain_5111, freqIndex, writes); 69185377Ssam} 70185377Ssam 71185377Ssam/* 72185377Ssam * Take the MHz channel value and set the Channel value 73185377Ssam * 74185377Ssam * ASSUMES: Writes enabled to analog bus 75185377Ssam */ 76185377Ssamstatic HAL_BOOL 77187831Ssamar5111SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan) 78185377Ssam{ 79185377Ssam#define CI_2GHZ_INDEX_CORRECTION 19 80187831Ssam uint16_t freq = ath_hal_gethwchannel(ah, chan); 81185377Ssam uint32_t refClk, reg32, data2111; 82185377Ssam int16_t chan5111, chanIEEE; 83185377Ssam 84185377Ssam /* 85185377Ssam * Structure to hold 11b tuning information for 5111/2111 86185377Ssam * 16 MHz mode, divider ratio = 198 = NP+S. N=16, S=4 or 6, P=12 87185377Ssam */ 88185377Ssam typedef struct { 89185377Ssam uint32_t refClkSel; /* reference clock, 1 for 16 MHz */ 90185377Ssam uint32_t channelSelect; /* P[7:4]S[3:0] bits */ 91185377Ssam uint16_t channel5111; /* 11a channel for 5111 */ 92185377Ssam } CHAN_INFO_2GHZ; 93185377Ssam 94186016Ssam static const CHAN_INFO_2GHZ chan2GHzData[] = { 95185377Ssam { 1, 0x46, 96 }, /* 2312 -19 */ 96185377Ssam { 1, 0x46, 97 }, /* 2317 -18 */ 97185377Ssam { 1, 0x46, 98 }, /* 2322 -17 */ 98185377Ssam { 1, 0x46, 99 }, /* 2327 -16 */ 99185377Ssam { 1, 0x46, 100 }, /* 2332 -15 */ 100185377Ssam { 1, 0x46, 101 }, /* 2337 -14 */ 101185377Ssam { 1, 0x46, 102 }, /* 2342 -13 */ 102185377Ssam { 1, 0x46, 103 }, /* 2347 -12 */ 103185377Ssam { 1, 0x46, 104 }, /* 2352 -11 */ 104185377Ssam { 1, 0x46, 105 }, /* 2357 -10 */ 105185377Ssam { 1, 0x46, 106 }, /* 2362 -9 */ 106185377Ssam { 1, 0x46, 107 }, /* 2367 -8 */ 107185377Ssam { 1, 0x46, 108 }, /* 2372 -7 */ 108185377Ssam /* index -6 to 0 are pad to make this a nolookup table */ 109185377Ssam { 1, 0x46, 116 }, /* -6 */ 110185377Ssam { 1, 0x46, 116 }, /* -5 */ 111185377Ssam { 1, 0x46, 116 }, /* -4 */ 112185377Ssam { 1, 0x46, 116 }, /* -3 */ 113185377Ssam { 1, 0x46, 116 }, /* -2 */ 114185377Ssam { 1, 0x46, 116 }, /* -1 */ 115185377Ssam { 1, 0x46, 116 }, /* 0 */ 116185377Ssam { 1, 0x46, 116 }, /* 2412 1 */ 117185377Ssam { 1, 0x46, 117 }, /* 2417 2 */ 118185377Ssam { 1, 0x46, 118 }, /* 2422 3 */ 119185377Ssam { 1, 0x46, 119 }, /* 2427 4 */ 120185377Ssam { 1, 0x46, 120 }, /* 2432 5 */ 121185377Ssam { 1, 0x46, 121 }, /* 2437 6 */ 122185377Ssam { 1, 0x46, 122 }, /* 2442 7 */ 123185377Ssam { 1, 0x46, 123 }, /* 2447 8 */ 124185377Ssam { 1, 0x46, 124 }, /* 2452 9 */ 125185377Ssam { 1, 0x46, 125 }, /* 2457 10 */ 126185377Ssam { 1, 0x46, 126 }, /* 2462 11 */ 127185377Ssam { 1, 0x46, 127 }, /* 2467 12 */ 128185377Ssam { 1, 0x46, 128 }, /* 2472 13 */ 129185377Ssam { 1, 0x44, 124 }, /* 2484 14 */ 130185377Ssam { 1, 0x46, 136 }, /* 2512 15 */ 131185377Ssam { 1, 0x46, 140 }, /* 2532 16 */ 132185377Ssam { 1, 0x46, 144 }, /* 2552 17 */ 133185377Ssam { 1, 0x46, 148 }, /* 2572 18 */ 134185377Ssam { 1, 0x46, 152 }, /* 2592 19 */ 135185377Ssam { 1, 0x46, 156 }, /* 2612 20 */ 136185377Ssam { 1, 0x46, 160 }, /* 2632 21 */ 137185377Ssam { 1, 0x46, 164 }, /* 2652 22 */ 138185377Ssam { 1, 0x46, 168 }, /* 2672 23 */ 139185377Ssam { 1, 0x46, 172 }, /* 2692 24 */ 140185377Ssam { 1, 0x46, 176 }, /* 2712 25 */ 141185377Ssam { 1, 0x46, 180 } /* 2732 26 */ 142185377Ssam }; 143185377Ssam 144187831Ssam OS_MARK(ah, AH_MARK_SETCHANNEL, freq); 145185377Ssam 146187831Ssam chanIEEE = chan->ic_ieee; 147187831Ssam if (IEEE80211_IS_CHAN_2GHZ(chan)) { 148185377Ssam const CHAN_INFO_2GHZ* ci = 149185377Ssam &chan2GHzData[chanIEEE + CI_2GHZ_INDEX_CORRECTION]; 150185377Ssam uint32_t txctl; 151185377Ssam 152185377Ssam data2111 = ((ath_hal_reverseBits(ci->channelSelect, 8) & 0xff) 153185377Ssam << 5) 154185377Ssam | (ci->refClkSel << 4); 155185377Ssam chan5111 = ci->channel5111; 156185377Ssam txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL); 157187831Ssam if (freq == 2484) { 158185377Ssam /* Enable channel spreading for channel 14 */ 159185377Ssam OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, 160185377Ssam txctl | AR_PHY_CCK_TX_CTRL_JAPAN); 161185377Ssam } else { 162185377Ssam OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, 163185377Ssam txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN); 164185377Ssam } 165185377Ssam } else { 166185377Ssam chan5111 = chanIEEE; /* no conversion needed */ 167185377Ssam data2111 = 0; 168185377Ssam } 169185377Ssam 170185377Ssam /* Rest of the code is common for 5 GHz and 2.4 GHz. */ 171185377Ssam if (chan5111 >= 145 || (chan5111 & 0x1)) { 172185377Ssam reg32 = ath_hal_reverseBits(chan5111 - 24, 8) & 0xff; 173185377Ssam refClk = 1; 174185377Ssam } else { 175185377Ssam reg32 = ath_hal_reverseBits(((chan5111 - 24)/2), 8) & 0xff; 176185377Ssam refClk = 0; 177185377Ssam } 178185377Ssam 179185377Ssam reg32 = (reg32 << 2) | (refClk << 1) | (1 << 10) | 0x1; 180185377Ssam OS_REG_WRITE(ah, AR_PHY(0x27), ((data2111 & 0xff) << 8) | (reg32 & 0xff)); 181185377Ssam reg32 >>= 8; 182185377Ssam OS_REG_WRITE(ah, AR_PHY(0x34), (data2111 & 0xff00) | (reg32 & 0xff)); 183185377Ssam 184185377Ssam AH_PRIVATE(ah)->ah_curchan = chan; 185185377Ssam return AH_TRUE; 186185377Ssam#undef CI_2GHZ_INDEX_CORRECTION 187185377Ssam} 188185377Ssam 189185377Ssam/* 190185377Ssam * Return a reference to the requested RF Bank. 191185377Ssam */ 192185377Ssamstatic uint32_t * 193185377Ssamar5111GetRfBank(struct ath_hal *ah, int bank) 194185377Ssam{ 195185377Ssam struct ar5111State *priv = AR5111(ah); 196185377Ssam 197185377Ssam HALASSERT(priv != AH_NULL); 198185377Ssam switch (bank) { 199185377Ssam case 0: return priv->Bank0Data; 200185377Ssam case 1: return priv->Bank1Data; 201185377Ssam case 2: return priv->Bank2Data; 202185377Ssam case 3: return priv->Bank3Data; 203185377Ssam case 6: return priv->Bank6Data; 204185377Ssam case 7: return priv->Bank7Data; 205185377Ssam } 206185377Ssam HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n", 207185377Ssam __func__, bank); 208185377Ssam return AH_NULL; 209185377Ssam} 210185377Ssam 211185377Ssam/* 212185377Ssam * Reads EEPROM header info from device structure and programs 213185377Ssam * all rf registers 214185377Ssam * 215185377Ssam * REQUIRES: Access to the analog rf device 216185377Ssam */ 217185377Ssamstatic HAL_BOOL 218187831Ssamar5111SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan, 219185377Ssam uint16_t modesIndex, uint16_t *rfXpdGain) 220185377Ssam{ 221187831Ssam uint16_t freq = ath_hal_gethwchannel(ah, chan); 222185377Ssam struct ath_hal_5212 *ahp = AH5212(ah); 223185377Ssam const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; 224185377Ssam uint16_t rfXpdGainFixed, rfPloSel, rfPwdXpd, gainI; 225185377Ssam uint16_t tempOB, tempDB; 226185377Ssam uint32_t ob2GHz, db2GHz, rfReg[N(ar5212Bank6_5111)]; 227185377Ssam int i, regWrites = 0; 228185377Ssam 229187831Ssam HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n", 230187831Ssam __func__, chan->ic_freq, chan->ic_flags, modesIndex); 231187831Ssam 232185377Ssam /* Setup rf parameters */ 233187831Ssam switch (chan->ic_flags & IEEE80211_CHAN_ALLFULL) { 234187831Ssam case IEEE80211_CHAN_A: 235187831Ssam if (4000 < freq && freq < 5260) { 236185377Ssam tempOB = ee->ee_ob1; 237185377Ssam tempDB = ee->ee_db1; 238187831Ssam } else if (5260 <= freq && freq < 5500) { 239185377Ssam tempOB = ee->ee_ob2; 240185377Ssam tempDB = ee->ee_db2; 241187831Ssam } else if (5500 <= freq && freq < 5725) { 242185377Ssam tempOB = ee->ee_ob3; 243185377Ssam tempDB = ee->ee_db3; 244187831Ssam } else if (freq >= 5725) { 245185377Ssam tempOB = ee->ee_ob4; 246185377Ssam tempDB = ee->ee_db4; 247185377Ssam } else { 248185377Ssam /* XXX when does this happen??? */ 249185377Ssam tempOB = tempDB = 0; 250185377Ssam } 251185377Ssam ob2GHz = db2GHz = 0; 252185377Ssam 253185377Ssam rfXpdGainFixed = ee->ee_xgain[headerInfo11A]; 254185377Ssam rfPloSel = ee->ee_xpd[headerInfo11A]; 255185377Ssam rfPwdXpd = !ee->ee_xpd[headerInfo11A]; 256185377Ssam gainI = ee->ee_gainI[headerInfo11A]; 257185377Ssam break; 258187831Ssam case IEEE80211_CHAN_B: 259185377Ssam tempOB = ee->ee_obFor24; 260185377Ssam tempDB = ee->ee_dbFor24; 261185377Ssam ob2GHz = ee->ee_ob2GHz[0]; 262185377Ssam db2GHz = ee->ee_db2GHz[0]; 263185377Ssam 264185377Ssam rfXpdGainFixed = ee->ee_xgain[headerInfo11B]; 265185377Ssam rfPloSel = ee->ee_xpd[headerInfo11B]; 266185377Ssam rfPwdXpd = !ee->ee_xpd[headerInfo11B]; 267185377Ssam gainI = ee->ee_gainI[headerInfo11B]; 268185377Ssam break; 269187831Ssam case IEEE80211_CHAN_G: 270187831Ssam case IEEE80211_CHAN_PUREG: /* NB: really 108G */ 271185377Ssam tempOB = ee->ee_obFor24g; 272185377Ssam tempDB = ee->ee_dbFor24g; 273185377Ssam ob2GHz = ee->ee_ob2GHz[1]; 274185377Ssam db2GHz = ee->ee_db2GHz[1]; 275185377Ssam 276185377Ssam rfXpdGainFixed = ee->ee_xgain[headerInfo11G]; 277185377Ssam rfPloSel = ee->ee_xpd[headerInfo11G]; 278185377Ssam rfPwdXpd = !ee->ee_xpd[headerInfo11G]; 279185377Ssam gainI = ee->ee_gainI[headerInfo11G]; 280185377Ssam break; 281185377Ssam default: 282185377Ssam HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n", 283187831Ssam __func__, chan->ic_flags); 284185377Ssam return AH_FALSE; 285185377Ssam } 286185377Ssam 287185377Ssam HALASSERT(1 <= tempOB && tempOB <= 5); 288185377Ssam HALASSERT(1 <= tempDB && tempDB <= 5); 289185377Ssam 290185377Ssam /* Bank 0 Write */ 291185377Ssam for (i = 0; i < N(ar5212Bank0_5111); i++) 292185377Ssam rfReg[i] = ar5212Bank0_5111[i][modesIndex]; 293187831Ssam if (IEEE80211_IS_CHAN_2GHZ(chan)) { 294185377Ssam ar5212ModifyRfBuffer(rfReg, ob2GHz, 3, 119, 0); 295185377Ssam ar5212ModifyRfBuffer(rfReg, db2GHz, 3, 122, 0); 296185377Ssam } 297185377Ssam HAL_INI_WRITE_BANK(ah, ar5212Bank0_5111, rfReg, regWrites); 298185377Ssam 299185377Ssam /* Bank 1 Write */ 300185377Ssam HAL_INI_WRITE_ARRAY(ah, ar5212Bank1_5111, 1, regWrites); 301185377Ssam 302185377Ssam /* Bank 2 Write */ 303185377Ssam HAL_INI_WRITE_ARRAY(ah, ar5212Bank2_5111, modesIndex, regWrites); 304185377Ssam 305185377Ssam /* Bank 3 Write */ 306185377Ssam HAL_INI_WRITE_ARRAY(ah, ar5212Bank3_5111, modesIndex, regWrites); 307185377Ssam 308185377Ssam /* Bank 6 Write */ 309185377Ssam for (i = 0; i < N(ar5212Bank6_5111); i++) 310185377Ssam rfReg[i] = ar5212Bank6_5111[i][modesIndex]; 311187831Ssam if (IEEE80211_IS_CHAN_A(chan)) { /* NB: CHANNEL_A | CHANNEL_T */ 312185377Ssam ar5212ModifyRfBuffer(rfReg, ee->ee_cornerCal.pd84, 1, 51, 3); 313185377Ssam ar5212ModifyRfBuffer(rfReg, ee->ee_cornerCal.pd90, 1, 45, 3); 314185377Ssam } 315185377Ssam ar5212ModifyRfBuffer(rfReg, rfPwdXpd, 1, 95, 0); 316185377Ssam ar5212ModifyRfBuffer(rfReg, rfXpdGainFixed, 4, 96, 0); 317185377Ssam /* Set 5212 OB & DB */ 318185377Ssam ar5212ModifyRfBuffer(rfReg, tempOB, 3, 104, 0); 319185377Ssam ar5212ModifyRfBuffer(rfReg, tempDB, 3, 107, 0); 320185377Ssam HAL_INI_WRITE_BANK(ah, ar5212Bank6_5111, rfReg, regWrites); 321185377Ssam 322185377Ssam /* Bank 7 Write */ 323185377Ssam for (i = 0; i < N(ar5212Bank7_5111); i++) 324185377Ssam rfReg[i] = ar5212Bank7_5111[i][modesIndex]; 325185377Ssam ar5212ModifyRfBuffer(rfReg, gainI, 6, 29, 0); 326185377Ssam ar5212ModifyRfBuffer(rfReg, rfPloSel, 1, 4, 0); 327185377Ssam 328187831Ssam if (IEEE80211_IS_CHAN_QUARTER(chan) || IEEE80211_IS_CHAN_HALF(chan)) { 329185377Ssam uint32_t rfWaitI, rfWaitS, rfMaxTime; 330185377Ssam 331185377Ssam rfWaitS = 0x1f; 332187831Ssam rfWaitI = (IEEE80211_IS_CHAN_HALF(chan)) ? 0x10 : 0x1f; 333185377Ssam rfMaxTime = 3; 334185377Ssam ar5212ModifyRfBuffer(rfReg, rfWaitS, 5, 19, 0); 335185377Ssam ar5212ModifyRfBuffer(rfReg, rfWaitI, 5, 24, 0); 336185377Ssam ar5212ModifyRfBuffer(rfReg, rfMaxTime, 2, 49, 0); 337185377Ssam 338185377Ssam } 339185377Ssam 340185377Ssam HAL_INI_WRITE_BANK(ah, ar5212Bank7_5111, rfReg, regWrites); 341185377Ssam 342185377Ssam /* Now that we have reprogrammed rfgain value, clear the flag. */ 343185377Ssam ahp->ah_rfgainState = HAL_RFGAIN_INACTIVE; 344185377Ssam 345185377Ssam return AH_TRUE; 346185377Ssam} 347185377Ssam 348185377Ssam/* 349185377Ssam * Returns interpolated or the scaled up interpolated value 350185377Ssam */ 351185377Ssamstatic uint16_t 352185377Ssaminterpolate(uint16_t target, uint16_t srcLeft, uint16_t srcRight, 353185377Ssam uint16_t targetLeft, uint16_t targetRight) 354185377Ssam{ 355185377Ssam uint16_t rv; 356185377Ssam int16_t lRatio; 357185377Ssam 358185377Ssam /* to get an accurate ratio, always scale, if want to scale, then don't scale back down */ 359185377Ssam if ((targetLeft * targetRight) == 0) 360185377Ssam return 0; 361185377Ssam 362185377Ssam if (srcRight != srcLeft) { 363185377Ssam /* 364185377Ssam * Note the ratio always need to be scaled, 365185377Ssam * since it will be a fraction. 366185377Ssam */ 367185377Ssam lRatio = (target - srcLeft) * EEP_SCALE / (srcRight - srcLeft); 368185377Ssam if (lRatio < 0) { 369185377Ssam /* Return as Left target if value would be negative */ 370185377Ssam rv = targetLeft; 371185377Ssam } else if (lRatio > EEP_SCALE) { 372185377Ssam /* Return as Right target if Ratio is greater than 100% (SCALE) */ 373185377Ssam rv = targetRight; 374185377Ssam } else { 375185377Ssam rv = (lRatio * targetRight + (EEP_SCALE - lRatio) * 376185377Ssam targetLeft) / EEP_SCALE; 377185377Ssam } 378185377Ssam } else { 379185377Ssam rv = targetLeft; 380185377Ssam } 381185377Ssam return rv; 382185377Ssam} 383185377Ssam 384185377Ssam/* 385185377Ssam * Read the transmit power levels from the structures taken from EEPROM 386185377Ssam * Interpolate read transmit power values for this channel 387185377Ssam * Organize the transmit power values into a table for writing into the hardware 388185377Ssam */ 389185377Ssamstatic HAL_BOOL 390185377Ssamar5111SetPowerTable(struct ath_hal *ah, 391187831Ssam int16_t *pMinPower, int16_t *pMaxPower, 392187831Ssam const struct ieee80211_channel *chan, 393185377Ssam uint16_t *rfXpdGain) 394185377Ssam{ 395187831Ssam uint16_t freq = ath_hal_gethwchannel(ah, chan); 396185377Ssam struct ath_hal_5212 *ahp = AH5212(ah); 397185377Ssam const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; 398185377Ssam FULL_PCDAC_STRUCT pcdacStruct; 399185377Ssam int i, j; 400185377Ssam 401185377Ssam uint16_t *pPcdacValues; 402185377Ssam int16_t *pScaledUpDbm; 403185377Ssam int16_t minScaledPwr; 404185377Ssam int16_t maxScaledPwr; 405185377Ssam int16_t pwr; 406185377Ssam uint16_t pcdacMin = 0; 407185377Ssam uint16_t pcdacMax = PCDAC_STOP; 408185377Ssam uint16_t pcdacTableIndex; 409185377Ssam uint16_t scaledPcdac; 410185377Ssam PCDACS_EEPROM *pSrcStruct; 411185377Ssam PCDACS_EEPROM eepromPcdacs; 412185377Ssam 413185377Ssam /* setup the pcdac struct to point to the correct info, based on mode */ 414187831Ssam switch (chan->ic_flags & IEEE80211_CHAN_ALLTURBOFULL) { 415187831Ssam case IEEE80211_CHAN_A: 416187831Ssam case IEEE80211_CHAN_ST: 417185377Ssam eepromPcdacs.numChannels = ee->ee_numChannels11a; 418185377Ssam eepromPcdacs.pChannelList = ee->ee_channels11a; 419185377Ssam eepromPcdacs.pDataPerChannel = ee->ee_dataPerChannel11a; 420185377Ssam break; 421187831Ssam case IEEE80211_CHAN_B: 422185377Ssam eepromPcdacs.numChannels = ee->ee_numChannels2_4; 423185377Ssam eepromPcdacs.pChannelList = ee->ee_channels11b; 424185377Ssam eepromPcdacs.pDataPerChannel = ee->ee_dataPerChannel11b; 425185377Ssam break; 426187831Ssam case IEEE80211_CHAN_G: 427187831Ssam case IEEE80211_CHAN_108G: 428185377Ssam eepromPcdacs.numChannels = ee->ee_numChannels2_4; 429185377Ssam eepromPcdacs.pChannelList = ee->ee_channels11g; 430185377Ssam eepromPcdacs.pDataPerChannel = ee->ee_dataPerChannel11g; 431185377Ssam break; 432185377Ssam default: 433185377Ssam HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n", 434187831Ssam __func__, chan->ic_flags); 435185377Ssam return AH_FALSE; 436185377Ssam } 437185377Ssam 438185377Ssam pSrcStruct = &eepromPcdacs; 439185377Ssam 440185377Ssam OS_MEMZERO(&pcdacStruct, sizeof(pcdacStruct)); 441185377Ssam pPcdacValues = pcdacStruct.PcdacValues; 442185377Ssam pScaledUpDbm = pcdacStruct.PwrValues; 443185377Ssam 444185377Ssam /* Initialize the pcdacs to dBM structs pcdacs to be 1 to 63 */ 445185377Ssam for (i = PCDAC_START, j = 0; i <= PCDAC_STOP; i+= PCDAC_STEP, j++) 446185377Ssam pPcdacValues[j] = i; 447185377Ssam 448185377Ssam pcdacStruct.numPcdacValues = j; 449185377Ssam pcdacStruct.pcdacMin = PCDAC_START; 450185377Ssam pcdacStruct.pcdacMax = PCDAC_STOP; 451185377Ssam 452185377Ssam /* Fill out the power values for this channel */ 453185377Ssam for (j = 0; j < pcdacStruct.numPcdacValues; j++ ) 454187831Ssam pScaledUpDbm[j] = ar5212GetScaledPower(freq, 455185377Ssam pPcdacValues[j], pSrcStruct); 456185377Ssam 457185377Ssam /* Now scale the pcdac values to fit in the 64 entry power table */ 458185377Ssam minScaledPwr = pScaledUpDbm[0]; 459185377Ssam maxScaledPwr = pScaledUpDbm[pcdacStruct.numPcdacValues - 1]; 460185377Ssam 461185377Ssam /* find minimum and make monotonic */ 462185377Ssam for (j = 0; j < pcdacStruct.numPcdacValues; j++) { 463185377Ssam if (minScaledPwr >= pScaledUpDbm[j]) { 464185377Ssam minScaledPwr = pScaledUpDbm[j]; 465185377Ssam pcdacMin = j; 466185377Ssam } 467185377Ssam /* 468185377Ssam * Make the full_hsh monotonically increasing otherwise 469185377Ssam * interpolation algorithm will get fooled gotta start 470185377Ssam * working from the top, hence i = 63 - j. 471185377Ssam */ 472185377Ssam i = (uint16_t)(pcdacStruct.numPcdacValues - 1 - j); 473185377Ssam if (i == 0) 474185377Ssam break; 475185377Ssam if (pScaledUpDbm[i-1] > pScaledUpDbm[i]) { 476185377Ssam /* 477185377Ssam * It could be a glitch, so make the power for 478185377Ssam * this pcdac the same as the power from the 479185377Ssam * next highest pcdac. 480185377Ssam */ 481185377Ssam pScaledUpDbm[i - 1] = pScaledUpDbm[i]; 482185377Ssam } 483185377Ssam } 484185377Ssam 485185377Ssam for (j = 0; j < pcdacStruct.numPcdacValues; j++) 486185377Ssam if (maxScaledPwr < pScaledUpDbm[j]) { 487185377Ssam maxScaledPwr = pScaledUpDbm[j]; 488185377Ssam pcdacMax = j; 489185377Ssam } 490185377Ssam 491185377Ssam /* Find the first power level with a pcdac */ 492185377Ssam pwr = (uint16_t)(PWR_STEP * 493185377Ssam ((minScaledPwr - PWR_MIN + PWR_STEP / 2) / PWR_STEP) + PWR_MIN); 494185377Ssam 495185377Ssam /* Write all the first pcdac entries based off the pcdacMin */ 496185377Ssam pcdacTableIndex = 0; 497185377Ssam for (i = 0; i < (2 * (pwr - PWR_MIN) / EEP_SCALE + 1); i++) { 498185377Ssam HALASSERT(pcdacTableIndex < PWR_TABLE_SIZE); 499185377Ssam ahp->ah_pcdacTable[pcdacTableIndex++] = pcdacMin; 500185377Ssam } 501185377Ssam 502185377Ssam i = 0; 503185377Ssam while (pwr < pScaledUpDbm[pcdacStruct.numPcdacValues - 1] && 504185377Ssam pcdacTableIndex < PWR_TABLE_SIZE) { 505185377Ssam pwr += PWR_STEP; 506185377Ssam /* stop if dbM > max_power_possible */ 507185377Ssam while (pwr < pScaledUpDbm[pcdacStruct.numPcdacValues - 1] && 508185377Ssam (pwr - pScaledUpDbm[i])*(pwr - pScaledUpDbm[i+1]) > 0) 509185377Ssam i++; 510185377Ssam /* scale by 2 and add 1 to enable round up or down as needed */ 511185377Ssam scaledPcdac = (uint16_t)(interpolate(pwr, 512185377Ssam pScaledUpDbm[i], pScaledUpDbm[i + 1], 513185377Ssam (uint16_t)(pPcdacValues[i] * 2), 514185377Ssam (uint16_t)(pPcdacValues[i + 1] * 2)) + 1); 515185377Ssam 516185377Ssam HALASSERT(pcdacTableIndex < PWR_TABLE_SIZE); 517185377Ssam ahp->ah_pcdacTable[pcdacTableIndex] = scaledPcdac / 2; 518185377Ssam if (ahp->ah_pcdacTable[pcdacTableIndex] > pcdacMax) 519185377Ssam ahp->ah_pcdacTable[pcdacTableIndex] = pcdacMax; 520185377Ssam pcdacTableIndex++; 521185377Ssam } 522185377Ssam 523185377Ssam /* Write all the last pcdac entries based off the last valid pcdac */ 524185377Ssam while (pcdacTableIndex < PWR_TABLE_SIZE) { 525185377Ssam ahp->ah_pcdacTable[pcdacTableIndex] = 526185377Ssam ahp->ah_pcdacTable[pcdacTableIndex - 1]; 527185377Ssam pcdacTableIndex++; 528185377Ssam } 529185377Ssam 530185377Ssam /* No power table adjustment for 5111 */ 531185377Ssam ahp->ah_txPowerIndexOffset = 0; 532185377Ssam 533185377Ssam return AH_TRUE; 534185377Ssam} 535185377Ssam 536185377Ssam/* 537185377Ssam * Get or interpolate the pcdac value from the calibrated data. 538185377Ssam */ 539185377Ssamstatic uint16_t 540185377Ssamar5212GetScaledPower(uint16_t channel, uint16_t pcdacValue, 541185377Ssam const PCDACS_EEPROM *pSrcStruct) 542185377Ssam{ 543185377Ssam uint16_t powerValue; 544185377Ssam uint16_t lFreq, rFreq; /* left and right frequency values */ 545185377Ssam uint16_t llPcdac, ulPcdac; /* lower and upper left pcdac values */ 546185377Ssam uint16_t lrPcdac, urPcdac; /* lower and upper right pcdac values */ 547185377Ssam uint16_t lPwr, uPwr; /* lower and upper temp pwr values */ 548185377Ssam uint16_t lScaledPwr, rScaledPwr; /* left and right scaled power */ 549185377Ssam 550185377Ssam if (ar5212FindValueInList(channel, pcdacValue, pSrcStruct, &powerValue)) { 551185377Ssam /* value was copied from srcStruct */ 552185377Ssam return powerValue; 553185377Ssam } 554185377Ssam 555185377Ssam ar5212GetLowerUpperValues(channel, 556185377Ssam pSrcStruct->pChannelList, pSrcStruct->numChannels, 557185377Ssam &lFreq, &rFreq); 558185377Ssam ar5212GetLowerUpperPcdacs(pcdacValue, 559185377Ssam lFreq, pSrcStruct, &llPcdac, &ulPcdac); 560185377Ssam ar5212GetLowerUpperPcdacs(pcdacValue, 561185377Ssam rFreq, pSrcStruct, &lrPcdac, &urPcdac); 562185377Ssam 563185377Ssam /* get the power index for the pcdac value */ 564185377Ssam ar5212FindValueInList(lFreq, llPcdac, pSrcStruct, &lPwr); 565185377Ssam ar5212FindValueInList(lFreq, ulPcdac, pSrcStruct, &uPwr); 566185377Ssam lScaledPwr = interpolate(pcdacValue, llPcdac, ulPcdac, lPwr, uPwr); 567185377Ssam 568185377Ssam ar5212FindValueInList(rFreq, lrPcdac, pSrcStruct, &lPwr); 569185377Ssam ar5212FindValueInList(rFreq, urPcdac, pSrcStruct, &uPwr); 570185377Ssam rScaledPwr = interpolate(pcdacValue, lrPcdac, urPcdac, lPwr, uPwr); 571185377Ssam 572185377Ssam return interpolate(channel, lFreq, rFreq, lScaledPwr, rScaledPwr); 573185377Ssam} 574185377Ssam 575185377Ssam/* 576185377Ssam * Find the value from the calibrated source data struct 577185377Ssam */ 578185377Ssamstatic HAL_BOOL 579185377Ssamar5212FindValueInList(uint16_t channel, uint16_t pcdacValue, 580185377Ssam const PCDACS_EEPROM *pSrcStruct, uint16_t *powerValue) 581185377Ssam{ 582185377Ssam const DATA_PER_CHANNEL *pChannelData = pSrcStruct->pDataPerChannel; 583185377Ssam int i; 584185377Ssam 585185377Ssam for (i = 0; i < pSrcStruct->numChannels; i++ ) { 586185377Ssam if (pChannelData->channelValue == channel) { 587185377Ssam const uint16_t* pPcdac = pChannelData->PcdacValues; 588185377Ssam int j; 589185377Ssam 590185377Ssam for (j = 0; j < pChannelData->numPcdacValues; j++ ) { 591185377Ssam if (*pPcdac == pcdacValue) { 592185377Ssam *powerValue = pChannelData->PwrValues[j]; 593185377Ssam return AH_TRUE; 594185377Ssam } 595185377Ssam pPcdac++; 596185377Ssam } 597185377Ssam } 598185377Ssam pChannelData++; 599185377Ssam } 600185377Ssam return AH_FALSE; 601185377Ssam} 602185377Ssam 603185377Ssam/* 604185377Ssam * Get the upper and lower pcdac given the channel and the pcdac 605185377Ssam * used in the search 606185377Ssam */ 607185377Ssamstatic void 608185377Ssamar5212GetLowerUpperPcdacs(uint16_t pcdac, uint16_t channel, 609185377Ssam const PCDACS_EEPROM *pSrcStruct, 610185377Ssam uint16_t *pLowerPcdac, uint16_t *pUpperPcdac) 611185377Ssam{ 612185377Ssam const DATA_PER_CHANNEL *pChannelData = pSrcStruct->pDataPerChannel; 613185377Ssam int i; 614185377Ssam 615185377Ssam /* Find the channel information */ 616185377Ssam for (i = 0; i < pSrcStruct->numChannels; i++) { 617185377Ssam if (pChannelData->channelValue == channel) 618185377Ssam break; 619185377Ssam pChannelData++; 620185377Ssam } 621185377Ssam ar5212GetLowerUpperValues(pcdac, pChannelData->PcdacValues, 622185377Ssam pChannelData->numPcdacValues, 623185377Ssam pLowerPcdac, pUpperPcdac); 624185377Ssam} 625185377Ssam 626185377Ssamstatic HAL_BOOL 627187831Ssamar5111GetChannelMaxMinPower(struct ath_hal *ah, 628187831Ssam const struct ieee80211_channel *chan, 629185377Ssam int16_t *maxPow, int16_t *minPow) 630185377Ssam{ 631185377Ssam /* XXX - Get 5111 power limits! */ 632185377Ssam /* NB: caller will cope */ 633185377Ssam return AH_FALSE; 634185377Ssam} 635185377Ssam 636185377Ssam/* 637185377Ssam * Adjust NF based on statistical values for 5GHz frequencies. 638185377Ssam */ 639185377Ssamstatic int16_t 640185377Ssamar5111GetNfAdjust(struct ath_hal *ah, const HAL_CHANNEL_INTERNAL *c) 641185377Ssam{ 642185377Ssam static const struct { 643185377Ssam uint16_t freqLow; 644185377Ssam int16_t adjust; 645185377Ssam } adjust5111[] = { 646185377Ssam { 5790, 6 }, /* NB: ordered high -> low */ 647185377Ssam { 5730, 4 }, 648185377Ssam { 5690, 3 }, 649185377Ssam { 5660, 2 }, 650185377Ssam { 5610, 1 }, 651185377Ssam { 5530, 0 }, 652185377Ssam { 5450, 0 }, 653185377Ssam { 5379, 1 }, 654185377Ssam { 5209, 3 }, 655185377Ssam { 3000, 5 }, 656185377Ssam { 0, 0 }, 657185377Ssam }; 658185377Ssam int i; 659185377Ssam 660185377Ssam for (i = 0; c->channel <= adjust5111[i].freqLow; i++) 661185377Ssam ; 662185377Ssam return adjust5111[i].adjust; 663185377Ssam} 664185377Ssam 665185377Ssam/* 666185377Ssam * Free memory for analog bank scratch buffers 667185377Ssam */ 668185377Ssamstatic void 669185377Ssamar5111RfDetach(struct ath_hal *ah) 670185377Ssam{ 671185377Ssam struct ath_hal_5212 *ahp = AH5212(ah); 672185377Ssam 673185377Ssam HALASSERT(ahp->ah_rfHal != AH_NULL); 674185377Ssam ath_hal_free(ahp->ah_rfHal); 675185377Ssam ahp->ah_rfHal = AH_NULL; 676185377Ssam} 677185377Ssam 678185377Ssam/* 679185377Ssam * Allocate memory for analog bank scratch buffers 680185377Ssam * Scratch Buffer will be reinitialized every reset so no need to zero now 681185377Ssam */ 682185406Ssamstatic HAL_BOOL 683185377Ssamar5111RfAttach(struct ath_hal *ah, HAL_STATUS *status) 684185377Ssam{ 685185377Ssam struct ath_hal_5212 *ahp = AH5212(ah); 686185377Ssam struct ar5111State *priv; 687185377Ssam 688185377Ssam HALASSERT(ah->ah_magic == AR5212_MAGIC); 689185377Ssam 690185377Ssam HALASSERT(ahp->ah_rfHal == AH_NULL); 691185377Ssam priv = ath_hal_malloc(sizeof(struct ar5111State)); 692185377Ssam if (priv == AH_NULL) { 693185377Ssam HALDEBUG(ah, HAL_DEBUG_ANY, 694185377Ssam "%s: cannot allocate private state\n", __func__); 695185377Ssam *status = HAL_ENOMEM; /* XXX */ 696185377Ssam return AH_FALSE; 697185377Ssam } 698185377Ssam priv->base.rfDetach = ar5111RfDetach; 699185377Ssam priv->base.writeRegs = ar5111WriteRegs; 700185377Ssam priv->base.getRfBank = ar5111GetRfBank; 701185377Ssam priv->base.setChannel = ar5111SetChannel; 702185377Ssam priv->base.setRfRegs = ar5111SetRfRegs; 703185377Ssam priv->base.setPowerTable = ar5111SetPowerTable; 704185377Ssam priv->base.getChannelMaxMinPower = ar5111GetChannelMaxMinPower; 705185377Ssam priv->base.getNfAdjust = ar5111GetNfAdjust; 706185377Ssam 707185377Ssam ahp->ah_pcdacTable = priv->pcdacTable; 708185377Ssam ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable); 709185377Ssam ahp->ah_rfHal = &priv->base; 710185377Ssam 711185377Ssam return AH_TRUE; 712185377Ssam} 713185406Ssam 714185406Ssamstatic HAL_BOOL 715185406Ssamar5111Probe(struct ath_hal *ah) 716185406Ssam{ 717185406Ssam return IS_RAD5111(ah); 718185406Ssam} 719185418SsamAH_RF(RF5111, ar5111Probe, ar5111RfAttach); 720