Searched refs:icode (Results 1 - 22 of 22) sorted by relevance

/freebsd-9.3-release/contrib/gcc/
H A Doptabs.c378 int icode;
389 icode = (int) widen_pattern_optab->handlers[(int) tmode0].insn_code;
390 gcc_assert (icode != CODE_FOR_nothing);
391 xmode0 = insn_data[icode].operand[1].mode;
397 xmode1 = insn_data[icode].operand[2].mode;
412 wxmode = insn_data[icode].operand[3].mode;
416 wmode = wxmode = insn_data[icode].operand[0].mode;
419 || ! (*insn_data[icode].operand[0].predicate) (target, wmode))
460 if (! (*insn_data[icode].operand[1].predicate) (xop0, xmode0)
466 if (! (*insn_data[icode]
374 int icode; local
510 int icode = (int) ternary_optab->handlers[(int) mode].insn_code; local
617 enum insn_code icode; local
1277 int icode = (int) binoptab->handlers[(int) mode].insn_code; local
2070 int icode = (int) unoptab->handlers[(int) mode].insn_code; local
2173 int icode = (int) binoptab->handlers[(int) mode].insn_code; local
2543 int icode = (int) unoptab->handlers[(int) mode].insn_code; local
3156 emit_unop_insn(int icode, rtx target, rtx op0, enum rtx_code code) argument
3748 prepare_operand(int icode, rtx x, int opnum, enum machine_mode mode, enum machine_mode wider_mode, int unsignedp) argument
3781 enum insn_code icode; local
4052 enum insn_code icode; local
4180 enum insn_code icode; local
4278 int icode = (int) add_optab->handlers[(int) GET_MODE (x)].insn_code; local
4295 int icode = (int) add_optab->handlers[(int) GET_MODE (r0)].insn_code; local
4312 int icode; local
4337 int icode = (int) sub_optab->handlers[(int) GET_MODE (x)].insn_code; local
4354 int icode = (int) sub_optab->handlers[(int) GET_MODE (r0)].insn_code; local
4371 int icode; local
4431 enum insn_code icode = can_extend_p (mto, mfrom, unsignedp); local
4449 enum insn_code icode; local
4494 enum insn_code icode; local
4696 enum insn_code icode; local
5566 enum insn_code icode; local
5665 vector_compare_rtx(tree cond, bool unsignedp, enum insn_code icode) argument
5699 enum insn_code icode = CODE_FOR_nothing; local
5724 enum insn_code icode; local
5769 expand_val_compare_and_swap_1(rtx mem, rtx old_val, rtx new_val, rtx target, enum insn_code icode) argument
5802 enum insn_code icode = sync_compare_and_swap[mode]; local
5818 enum insn_code icode; local
5912 enum insn_code icode; local
5982 enum insn_code icode; local
6075 enum insn_code old_code, new_code, icode; local
6234 enum insn_code icode; local
[all...]
H A Dtarghooks.c506 sri->icode = sri->prev_sri->t_icode;
519 enum insn_code icode = (in_p ? reload_in_optab[(int) reload_mode] local
522 if (icode != CODE_FOR_nothing
523 && insn_data[(int) icode].operand[in_p].predicate
524 && ! insn_data[(int) icode].operand[in_p].predicate (x, reload_mode))
525 icode = CODE_FOR_nothing;
526 else if (icode != CODE_FOR_nothing)
532 gcc_assert (insn_data[(int) icode].n_operands == 3);
533 insn_constraint = insn_data[(int) icode].operand[!in_p].constraint;
551 scratch_constraint = insn_data[(int) icode]
[all...]
H A Dtree-vect-patterns.c491 enum insn_code icode; local
499 || (icode = optab->handlers[(int) vec_mode].insn_code) ==
503 || (insn_data[icode].operand[0].mode !=
H A Dexpmed.c407 int icode = (int) vec_set_optab->handlers[outermode].insn_code;
413 enum machine_mode mode0 = insn_data[icode].operand[0].mode;
414 enum machine_mode mode1 = insn_data[icode].operand[1].mode;
415 enum machine_mode mode2 = insn_data[icode].operand[2].mode;
419 if (! (*insn_data[icode].operand[1].predicate) (src, mode1))
422 if (! (*insn_data[icode].operand[2].predicate) (rtxpos, mode2))
427 gcc_assert ((*insn_data[icode].operand[0].predicate) (dest, mode0)
428 && (*insn_data[icode].operand[1].predicate) (src, mode1)
429 && (*insn_data[icode].operand[2].predicate) (rtxpos, mode2));
430 pat = GEN_FCN (icode) (des
406 int icode = (int) vec_set_optab->handlers[outermode].insn_code; local
515 int icode = movstrict_optab->handlers[fieldmode].insn_code; local
1140 int icode = (int) vec_extract_optab->handlers[outermode].insn_code; local
5114 enum insn_code icode; local
[all...]
H A Drecog.c254 int icode = recog (pat, insn,
258 int is_asm = icode < 0 && asm_noperands (PATTERN (insn)) >= 0;
264 || (!is_asm && icode < 0))
274 if (added_clobbers_hard_reg_p (icode))
279 add_clobbers (newpat, icode);
292 INSN_CODE (insn) = icode;
2025 int icode;
2087 icode = recog_memoized (insn);
2088 if (icode < 0)
2091 recog_data.n_operands = noperands = insn_data[icode]
252 int icode = recog (pat, insn, local
2013 int icode; local
[all...]
H A Dexpr.c879 enum insn_code icode;
990 icode = mov_optab->handlers[(int) mode].insn_code;
991 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
992 move_by_pieces_1 (GEN_FCN (icode), mode, &data);
1060 enum insn_code icode;
1070 icode = mov_optab->handlers[(int) mode].insn_code;
1071 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
2201 enum insn_code icode;
2248 icode = mov_optab->handlers[(int) mode].insn_code;
2249 if (icode !
876 enum insn_code icode; local
1057 enum insn_code icode; local
2195 enum insn_code icode; local
2371 enum insn_code icode; local
3470 enum insn_code icode; local
5315 int icode = 0; local
7224 int icode; local
9037 enum insn_code icode; local
[all...]
H A Dreload.c324 enum insn_code icode = CODE_FOR_nothing;
362 sri.icode = CODE_FOR_nothing;
365 icode = sri.icode;
368 if (class == NO_REGS && icode == CODE_FOR_nothing)
378 if (icode != CODE_FOR_nothing)
388 gcc_assert (insn_data[(int) icode].n_operands == 3);
391 an icode to reload from an intermediate tertiary reload register.
396 scratch_constraint = insn_data[(int) icode].operand[2].constraint;
407 mode = insn_data[(int) icode]
322 enum insn_code icode = CODE_FOR_nothing; local
517 enum insn_code icode; local
541 scratch_reload_class(enum insn_code icode) argument
5698 int icode = (int) add_optab->handlers[(int) Pmode].insn_code; local
[all...]
H A Dreload1.c2943 int icode = recog_memoized (insn);
2955 if (! insn_is_asm && icode < 0)
3171 if (insn_is_asm || insn_data[icode].operand[i].eliminable)
6375 enum insn_code icode)
6378 enum reg_class new_class = scratch_reload_class (icode);
6379 enum machine_mode new_mode = insn_data[(int) icode].operand[2].mode;
6612 and icode, if any. If OLDEQUIV and OLD are different or
6614 still need a secondary register and what the icode should
6616 icode is different, go back to reloading from OLD if using
6618 cannot have different class or icode du
2928 int icode = recog_memoized (insn); local
6349 reload_adjust_reg_for_icode(rtx *reload_reg, rtx alt_reload_reg, enum insn_code icode) argument
6605 enum insn_code icode; local
[all...]
H A Dtarget.h60 /* icode is actually an enum insn_code, but we don't want to force every
62 int icode; member in struct:secondary_reload_info
H A Dregrename.c758 int i, icode; local
778 icode = recog_memoized (insn);
830 if (icode >= 0
831 && insn_data[icode].operand[dup_num].eliminable == 0)
H A Dtree-vect-transform.c1489 int icode; local
1546 icode = (int) optab->handlers[(int) vec_mode].insn_code;
1547 if (icode == CODE_FOR_nothing)
1577 optab_op2_mode = insn_data[icode].operand[2].mode;
1618 optab_op2_mode = insn_data[icode].operand[2].mode;
H A Dreal.c998 real_arithmetic (REAL_VALUE_TYPE *r, int icode, const REAL_VALUE_TYPE *op0,
1001 enum tree_code code = icode;
1004 return decimal_real_arithmetic (r, icode, op0, op1);
1061 real_arithmetic2 (int icode, const REAL_VALUE_TYPE *op0,
1065 real_arithmetic (&r, icode, op0, op1);
1070 real_compare (int icode, const REAL_VALUE_TYPE *op0,
1073 enum tree_code code = icode;
995 real_arithmetic(REAL_VALUE_TYPE *r, int icode, const REAL_VALUE_TYPE *op0, const REAL_VALUE_TYPE *op1) argument
1058 real_arithmetic2(int icode, const REAL_VALUE_TYPE *op0, const REAL_VALUE_TYPE *op1) argument
1067 real_compare(int icode, const REAL_VALUE_TYPE *op0, const REAL_VALUE_TYPE *op1) argument
H A Dbuiltins.c2646 enum insn_code icode = CODE_FOR_nothing;
2675 icode = strlen_optab->handlers[(int) insn_mode].insn_code;
2676 if (icode != CODE_FOR_nothing)
2702 char_mode = insn_data[(int) icode].operand[2].mode;
2703 if (! (*insn_data[(int) icode].operand[2].predicate) (char_rtx,
2707 pat = GEN_FCN (icode) (result, gen_rtx_MEM (BLKmode, src_reg),
5611 enum insn_code icode;
5619 icode = sync_lock_release[mode];
5620 if (icode != CODE_FOR_nothing)
5622 if (!insn_data[icode]
2645 enum insn_code icode = CODE_FOR_nothing; local
5609 enum insn_code icode; local
[all...]
H A Dgcse.c1215 int icode;
1239 return ((icode = recog (PATTERN (test_insn), test_insn, &num_clobbers)) >= 0
1240 && (num_clobbers == 0 || ! added_clobbers_hard_reg_p (icode)));
1206 int icode; local
/freebsd-9.3-release/contrib/gcc/config/rs6000/
H A Drs6000.c266 const enum insn_code icode; member in struct:builtin_description
6599 const enum insn_code icode;
6754 rs6000_expand_unop_builtin (enum insn_code icode, tree arglist, rtx target)
6759 enum machine_mode tmode = insn_data[icode].operand[0].mode;
6760 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
6762 if (icode == CODE_FOR_nothing)
6770 if (icode == CODE_FOR_altivec_vspltisb
6771 || icode == CODE_FOR_altivec_vspltish
6772 || icode == CODE_FOR_altivec_vspltisw
6773 || icode
6583 const enum insn_code icode; member in struct:builtin_description_predicates
6738 rs6000_expand_unop_builtin(enum insn_code icode, tree arglist, rtx target) argument
6787 altivec_expand_abs_builtin(enum insn_code icode, tree arglist, rtx target) argument
6819 rs6000_expand_binop_builtin(enum insn_code icode, tree arglist, rtx target) argument
6892 altivec_expand_predicate_builtin(enum insn_code icode, const char *opcode, tree arglist, rtx target) argument
6969 altivec_expand_lv_builtin(enum insn_code icode, tree arglist, rtx target) argument
7015 spe_expand_stv_builtin(enum insn_code icode, tree arglist) argument
7048 altivec_expand_stv_builtin(enum insn_code icode, tree arglist) argument
7089 rs6000_expand_ternop_builtin(enum insn_code icode, tree arglist, rtx target) argument
7158 enum insn_code icode; local
7212 enum insn_code icode; local
7427 enum insn_code icode; local
7640 enum insn_code icode; local
7767 spe_expand_predicate_builtin(enum insn_code icode, tree arglist, rtx target) argument
7875 spe_expand_evsel_builtin(enum insn_code icode, tree arglist, rtx target) argument
7946 int icode = (int) CODE_FOR_altivec_lvsr; local
[all...]
/freebsd-9.3-release/contrib/gcc/config/i386/
H A Di386.c15022 const enum insn_code icode;
15760 mode = insn_data[d->icode].operand[1].mode;
15800 if (d->icode == CODE_FOR_sse_maskcmpv4sf3
15801 || d->icode == CODE_FOR_sse_vmmaskcmpv4sf3)
15804 if (d->icode == CODE_FOR_sse2_maskcmpv2df3
15805 || d->icode == CODE_FOR_sse2_vmmaskcmpv2df3)
15819 mode = insn_data[d->icode].operand[1].mode;
16164 ix86_expand_binop_builtin (enum insn_code icode, tree arglist, rtx target)
16171 enum machine_mode tmode = insn_data[icode].operand[0].mode;
16172 enum machine_mode mode0 = insn_data[icode]
14991 const enum insn_code icode; member in struct:builtin_description
16133 ix86_expand_binop_builtin(enum insn_code icode, tree arglist, rtx target) argument
16201 ix86_expand_store_builtin(enum insn_code icode, tree arglist) argument
16226 ix86_expand_unop_builtin(enum insn_code icode, tree arglist, rtx target, int do_load) argument
16262 ix86_expand_unop1_builtin(enum insn_code icode, tree arglist, rtx target) argument
16536 enum insn_code icode; local
[all...]
/freebsd-9.3-release/contrib/gcc/config/mips/
H A Dmips.c10076 enum insn_code icode;
10343 mips_prepare_builtin_arg (enum insn_code icode,
10350 mode = insn_data[icode].operand[op].mode;
10351 if (!insn_data[icode].operand[op].predicate (value, mode))
10355 if (!insn_data[icode].operand[op].predicate (value, mode))
10370 mips_prepare_builtin_target (enum insn_code icode, unsigned int op, rtx target)
10374 mode = insn_data[icode].operand[op].mode;
10375 if (target == 0 || !insn_data[icode].operand[op].predicate (target, mode))
10388 enum insn_code icode;
10405 icode
10017 enum insn_code icode; member in struct:builtin_description
10284 mips_prepare_builtin_arg(enum insn_code icode, unsigned int op, tree *arglist) argument
10311 mips_prepare_builtin_target(enum insn_code icode, unsigned int op, rtx target) argument
10329 enum insn_code icode; local
10624 mips_expand_builtin_direct(enum insn_code icode, rtx target, tree arglist, bool has_target) argument
10669 mips_expand_builtin_movtf(enum mips_builtin_type type, enum insn_code icode, enum mips_fp_condition cond, rtx target, tree arglist) argument
10730 mips_expand_builtin_compare(enum mips_builtin_type builtin_type, enum insn_code icode, enum mips_fp_condition cond, rtx target, tree arglist) argument
[all...]
/freebsd-9.3-release/contrib/gcc/config/arm/
H A Darm.c12154 const enum insn_code icode;
12495 mode = insn_data[d->icode].operand[1].mode;
12652 arm_expand_binop_builtin (enum insn_code icode,
12660 enum machine_mode tmode = insn_data[icode].operand[0].mode;
12661 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
12662 enum machine_mode mode1 = insn_data[icode].operand[2].mode;
12671 || ! (*insn_data[icode].operand[0].predicate) (target, tmode)) argument
12676 if (! (*insn_data[icode].operand[1].predicate) (op0, mode0))
12678 if (! (*insn_data[icode].operand[2].predicate) (op1, mode1))
12681 pat = GEN_FCN (icode) (targe
12134 const enum insn_code icode; member in struct:builtin_description
12632 arm_expand_binop_builtin(enum insn_code icode, tree arglist, rtx target) argument
12716 enum insn_code icode; local
[all...]
/freebsd-9.3-release/contrib/gcc/config/s390/
H A Ds390.c8219 enum insn_code icode;
8226 icode = code_for_builtin[fcode];
8227 if (icode == 0)
8244 insn_op = &insn_data[icode].operand[arity + nonvoid];
8254 enum machine_mode tmode = insn_data[icode].operand[0].mode;
8257 || !(*insn_data[icode].operand[0].predicate) (target, tmode))
8264 pat = GEN_FCN (icode) (target);
8268 pat = GEN_FCN (icode) (target, op[0]);
8270 pat = GEN_FCN (icode) (op[0]);
8273 pat = GEN_FCN (icode) (targe
8218 enum insn_code icode; local
[all...]
/freebsd-9.3-release/contrib/gcc/config/ia64/
H A Dia64.c2095 enum insn_code icode;
2111 icode = CODE_FOR_fetchadd_acq_si;
2113 icode = CODE_FOR_fetchadd_acq_di;
2114 emit_insn (GEN_FCN (icode) (old_dst, mem, val));
2167 case QImode: icode = CODE_FOR_cmpxchg_rel_qi; break;
2168 case HImode: icode = CODE_FOR_cmpxchg_rel_hi; break;
2169 case SImode: icode = CODE_FOR_cmpxchg_rel_si; break;
2170 case DImode: icode = CODE_FOR_cmpxchg_rel_di; break;
2175 emit_insn (GEN_FCN (icode) (cmp_reg, mem, ar_ccv, new_reg));
2090 enum insn_code icode; local
/freebsd-9.3-release/contrib/gcc/config/sparc/
H A Dsparc.c8003 unsigned int icode = DECL_FUNCTION_CODE (fndecl);
8008 mode[0] = insn_data[icode].operand[0].mode;
8011 || ! (*insn_data[icode].operand[0].predicate) (target, mode[0]))
8022 mode[arg_count] = insn_data[icode].operand[arg_count].mode;
8025 if (! (*insn_data[icode].operand[arg_count].predicate) (op[arg_count],
8033 pat = GEN_FCN (icode) (op[0], op[1]);
8036 pat = GEN_FCN (icode) (op[0], op[1], op[2]);
8039 pat = GEN_FCN (icode) (op[0], op[1], op[2], op[3]);
7978 unsigned int icode = DECL_FUNCTION_CODE (fndecl); local
/freebsd-9.3-release/contrib/ipfilter/tools/
H A Dipf_y.y1062 icmp: | itype icode
1077 icode: | seticmpcode icmpcode label

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