Searched refs:cycles (Results 1 - 17 of 17) sorted by relevance

/freebsd-9.3-release/sys/contrib/octeon-sdk/
H A Dcvmx-tim.h122 uint64_t start_time; /**< Time the timer started in cycles */
213 const uint64_t cycles = cvmx_clock_get_count(CVMX_CLOCK_TIM); /* Get our reference time early for accuracy */ local
233 current_bucket = ((cycles - cvmx_tim.start_time)
235 work_bucket = (((ticks_from_now * cvmx_tim.tick_cycles) + cycles - cvmx_tim.start_time)
292 delete_info->commit_cycles = cycles + (ticks_from_now - 2) * cvmx_tim.tick_cycles;
317 const uint64_t cycles = cvmx_clock_get_count(CVMX_CLOCK_TIM); local
319 if ((int64_t)(cycles - delete_info->commit_cycles) < 0)
H A Dcvmx-access.h180 * Reads a chip global cycle counter. This counts SCLK cycles since
191 * Wait for the specified number of core clock cycles
193 * @param cycles
195 CVMX_FUNCTION void cvmx_wait(uint64_t cycles);
205 * Wait for the specified number of io clock cycles
207 * @param cycles
209 CVMX_FUNCTION void cvmx_wait_io(uint64_t cycles);
H A Dcvmx-access-native.h149 cycles and do nothing */
274 cycles and do nothing */
618 * Reads a chip global cycle counter. This counts SCLK cycles since
633 * Wait for the specified number of core clock cycles
635 * @param cycles
637 static inline void cvmx_wait(uint64_t cycles) argument
639 uint64_t done = cvmx_get_cycle() + cycles;
664 * Wait for the specified number of io clock cycles
666 * @param cycles
668 static inline void cvmx_wait_io(uint64_t cycles) argument
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H A Dcvmx-tra-defs.h430 granularity=8^n cycles, n=0,1,2,3,4,5,6,7 */
511 granularity=8^n cycles, n=0,1,2,3,4,5,6,7 */
601 granularity=8^n cycles, n=0,1,2,3,4,5,6,7 */
663 uint64_t cycles : 48; /**< Cycles since the last entry was written */ member in struct:cvmx_tra_cycles_since::cvmx_tra_cycles_since_s
669 uint64_t cycles : 48;
699 uint64_t cycles : 40; /**< Cycles since the last entry was written */ member in struct:cvmx_tra_cycles_since1::cvmx_tra_cycles_since1_s
709 uint64_t cycles : 40;
/freebsd-9.3-release/sys/kern/
H A Dkern_poll.c209 "Every this many cycles check registers");
225 &residual_burst, 0, "# of residual cycles in burst");
424 int i, cycles; local
443 cycles = (residual_burst < poll_each_burst) ?
445 residual_burst -= cycles;
448 pr[i].handler(pr[i].ifp, arg, cycles);
/freebsd-9.3-release/contrib/gcc/
H A Dipa-inline.c516 cgraph_find_cycles (struct cgraph_node *node, htab_t cycles) argument
523 slot = htab_find_slot (cycles, node, INSERT);
535 cgraph_find_cycles (e->callee, cycles);
545 cgraph_flatten_node (struct cgraph_node *node, htab_t cycles) argument
557 && !htab_find (cycles, e->callee))
562 cgraph_flatten_node (e->callee, cycles);
961 htab_t cycles; local
965 cycles = htab_create (7, htab_hash_pointer, htab_eq_pointer, NULL);
966 cgraph_find_cycles (node, cycles);
967 cgraph_flatten_node (node, cycles);
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H A Dmodulo-sched.c69 3. Compute MII: a lower bound on the number of cycles to schedule the loop.
71 1. Set II = MII. We will try to schedule the loop within II cycles.
73 For each insn compute an interval of cycles by considering already-
75 the insn in the cycles of this window checking for potential
82 5. If we succeeded in scheduling the loop within II cycles, we now
85 II cycles (i.e. use register copies to prevent a def from overwriting
402 requires more cycles than this bound. Currently set to the sum of the
1202 /* Generate the kernel just to be able to measure its cycles. */
1206 /* Get the number of cycles the new kernel expect to execute in. */
1347 /* A limit on the number of cycles tha
2304 int cycles = 0; local
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/freebsd-9.3-release/sys/xen/interface/
H A Dtrace.h153 uint32_t cycles_included:1; /* u.cycles or u.no_cycles? */
158 } cycles; member in union:t_rec::__anon10613
/freebsd-9.3-release/contrib/ntp/ntpd/
H A Drefclock_irig.c261 int cycles; /* carrier cycles */ member in struct:irigunit
262 int dcycles; /* data cycles */
672 * and ten cycles in the baud. Since the PLL has aligned the
696 up->cycles <<= 1;
698 up->cycles |= 1;
699 if ((up->cycles & 0x303c0f03) == 0x300c0300) {
/freebsd-9.3-release/contrib/bmake/unit-tests/
H A Dtest.exp86 make: Graph cycles through `cycle.2.99'
87 make: Graph cycles through `cycle.2.98'
88 make: Graph cycles through `cycle.2.97'
/freebsd-9.3-release/contrib/gdb/gdb/
H A Dminimon.h408 INT32 cycles; member in struct:status_msg_t
/freebsd-9.3-release/sys/dev/e1000/
H A Dif_igb.h453 struct cyclecounter cycles; member in struct:adapter
/freebsd-9.3-release/sys/dev/cxgbe/common/
H A Dcommon.h480 void t4_pmtx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]);
481 void t4_pmrx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]);
H A Dt4_hw.c3749 * @cycles: where to store the cycle statistics
3753 void t4_pmtx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]) argument
3762 cycles[i] = t4_read_reg64(adap, A_PM_TX_STAT_LSB);
3767 cycles[i] = (((u64)data[0] << 32) | data[1]);
3776 * @cycles: where to store the cycle statistics
3780 void t4_pmrx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]) argument
3789 cycles[i] = t4_read_reg64(adap, A_PM_RX_STAT_LSB);
3794 cycles[i] = (((u64)data[0] << 32) | data[1]);
/freebsd-9.3-release/sys/mips/rmi/dev/xlr/
H A Drge.c1511 uint32_t cycles; local
1533 cycles = mips_rd_count();
1548 (read_c0_count() - cycles));
/freebsd-9.3-release/lib/libpmc/
H A Dlibpmc.c444 EV_ALIAS("cycles", "tsc"),
552 EV_ALIAS("cycles", "tsc-tsc"),
556 EV_ALIAS("unhalted-cycles", "iap-unhalted-core-cycles"),
572 EV_ALIAS("cycles", "tsc-tsc"),
576 EV_ALIAS("unhalted-cycles", "iaf-cpu-clk-unhalted.core"),
583 EV_ALIAS("cycles", "tsc-tsc"),
587 EV_ALIAS("unhalted-cycles", "iap-cpu-clk-unhalted.core_p"),
984 EV_ALIAS("cycles", "tsc"),
989 EV_ALIAS("unhalted-cycles", "k
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/freebsd-9.3-release/contrib/gcc/config/arm/
H A Darm.c1332 2 cycles to load a constant, and the load scheduler may well
1429 never return, and many memory cycles can be saved by not storing
4312 int cycles = 0;
4318 cycles++;
4320 return COSTS_N_INSNS (2) + cycles;
5994 produces worse code -- '3 cycles + any stalls on rd2' instead of
5995 '2 cycles + any stalls on rd2'. On ARMs with only one cache
5997 than 6 cycles, whereas the ldm sequence would only take 5 and
6263 For XScale ldm requires 2 + NREGS cycles to complete and blocks
6272 An ldr instruction takes 1-3 cycles, bu
4302 int cycles = 0; local
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