1/******************************************************************************
2 * include/public/trace.h
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a copy
5 * of this software and associated documentation files (the "Software"), to
6 * deal in the Software without restriction, including without limitation the
7 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
8 * sell copies of the Software, and to permit persons to whom the Software is
9 * furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 *
22 * Mark Williamson, (C) 2004 Intel Research Cambridge
23 * Copyright (C) 2005 Bin Ren
24 */
25
26#ifndef __XEN_PUBLIC_TRACE_H__
27#define __XEN_PUBLIC_TRACE_H__
28
29#define TRACE_EXTRA_MAX    7
30#define TRACE_EXTRA_SHIFT 28
31
32/* Trace classes */
33#define TRC_CLS_SHIFT 16
34#define TRC_GEN      0x0001f000    /* General trace            */
35#define TRC_SCHED    0x0002f000    /* Xen Scheduler trace      */
36#define TRC_DOM0OP   0x0004f000    /* Xen DOM0 operation trace */
37#define TRC_HVM      0x0008f000    /* Xen HVM trace            */
38#define TRC_MEM      0x0010f000    /* Xen memory trace         */
39#define TRC_PV       0x0020f000    /* Xen PV traces            */
40#define TRC_SHADOW   0x0040f000    /* Xen shadow tracing       */
41#define TRC_ALL      0x0ffff000
42#define TRC_HD_TO_EVENT(x) ((x)&0x0fffffff)
43#define TRC_HD_CYCLE_FLAG (1UL<<31)
44#define TRC_HD_INCLUDES_CYCLE_COUNT(x) ( !!( (x) & TRC_HD_CYCLE_FLAG ) )
45#define TRC_HD_EXTRA(x)    (((x)>>TRACE_EXTRA_SHIFT)&TRACE_EXTRA_MAX)
46
47/* Trace subclasses */
48#define TRC_SUBCLS_SHIFT 12
49
50/* trace subclasses for SVM */
51#define TRC_HVM_ENTRYEXIT 0x00081000   /* VMENTRY and #VMEXIT       */
52#define TRC_HVM_HANDLER   0x00082000   /* various HVM handlers      */
53
54#define TRC_SCHED_MIN       0x00021000   /* Just runstate changes */
55#define TRC_SCHED_VERBOSE   0x00028000   /* More inclusive scheduling */
56
57/* Trace events per class */
58#define TRC_LOST_RECORDS        (TRC_GEN + 1)
59#define TRC_TRACE_WRAP_BUFFER  (TRC_GEN + 2)
60#define TRC_TRACE_CPU_CHANGE    (TRC_GEN + 3)
61
62#define TRC_SCHED_RUNSTATE_CHANGE (TRC_SCHED_MIN + 1)
63#define TRC_SCHED_DOM_ADD        (TRC_SCHED_VERBOSE +  1)
64#define TRC_SCHED_DOM_REM        (TRC_SCHED_VERBOSE +  2)
65#define TRC_SCHED_SLEEP          (TRC_SCHED_VERBOSE +  3)
66#define TRC_SCHED_WAKE           (TRC_SCHED_VERBOSE +  4)
67#define TRC_SCHED_YIELD          (TRC_SCHED_VERBOSE +  5)
68#define TRC_SCHED_BLOCK          (TRC_SCHED_VERBOSE +  6)
69#define TRC_SCHED_SHUTDOWN       (TRC_SCHED_VERBOSE +  7)
70#define TRC_SCHED_CTL            (TRC_SCHED_VERBOSE +  8)
71#define TRC_SCHED_ADJDOM         (TRC_SCHED_VERBOSE +  9)
72#define TRC_SCHED_SWITCH         (TRC_SCHED_VERBOSE + 10)
73#define TRC_SCHED_S_TIMER_FN     (TRC_SCHED_VERBOSE + 11)
74#define TRC_SCHED_T_TIMER_FN     (TRC_SCHED_VERBOSE + 12)
75#define TRC_SCHED_DOM_TIMER_FN   (TRC_SCHED_VERBOSE + 13)
76#define TRC_SCHED_SWITCH_INFPREV (TRC_SCHED_VERBOSE + 14)
77#define TRC_SCHED_SWITCH_INFNEXT (TRC_SCHED_VERBOSE + 15)
78
79#define TRC_MEM_PAGE_GRANT_MAP      (TRC_MEM + 1)
80#define TRC_MEM_PAGE_GRANT_UNMAP    (TRC_MEM + 2)
81#define TRC_MEM_PAGE_GRANT_TRANSFER (TRC_MEM + 3)
82
83#define TRC_PV_HYPERCALL             (TRC_PV +  1)
84#define TRC_PV_TRAP                  (TRC_PV +  3)
85#define TRC_PV_PAGE_FAULT            (TRC_PV +  4)
86#define TRC_PV_FORCED_INVALID_OP     (TRC_PV +  5)
87#define TRC_PV_EMULATE_PRIVOP        (TRC_PV +  6)
88#define TRC_PV_EMULATE_4GB           (TRC_PV +  7)
89#define TRC_PV_MATH_STATE_RESTORE    (TRC_PV +  8)
90#define TRC_PV_PAGING_FIXUP          (TRC_PV +  9)
91#define TRC_PV_GDT_LDT_MAPPING_FAULT (TRC_PV + 10)
92#define TRC_PV_PTWR_EMULATION        (TRC_PV + 11)
93#define TRC_PV_PTWR_EMULATION_PAE    (TRC_PV + 12)
94  /* Indicates that addresses in trace record are 64 bits */
95#define TRC_64_FLAG               (0x100)
96
97#define TRC_SHADOW_NOT_SHADOW                 (TRC_SHADOW +  1)
98#define TRC_SHADOW_FAST_PROPAGATE             (TRC_SHADOW +  2)
99#define TRC_SHADOW_FAST_MMIO                  (TRC_SHADOW +  3)
100#define TRC_SHADOW_FALSE_FAST_PATH            (TRC_SHADOW +  4)
101#define TRC_SHADOW_MMIO                       (TRC_SHADOW +  5)
102#define TRC_SHADOW_FIXUP                      (TRC_SHADOW +  6)
103#define TRC_SHADOW_DOMF_DYING                 (TRC_SHADOW +  7)
104#define TRC_SHADOW_EMULATE                    (TRC_SHADOW +  8)
105#define TRC_SHADOW_EMULATE_UNSHADOW_USER      (TRC_SHADOW +  9)
106#define TRC_SHADOW_EMULATE_UNSHADOW_EVTINJ    (TRC_SHADOW + 10)
107#define TRC_SHADOW_EMULATE_UNSHADOW_UNHANDLED (TRC_SHADOW + 11)
108#define TRC_SHADOW_WRMAP_BF                   (TRC_SHADOW + 12)
109#define TRC_SHADOW_PREALLOC_UNPIN             (TRC_SHADOW + 13)
110#define TRC_SHADOW_RESYNC_FULL                (TRC_SHADOW + 14)
111#define TRC_SHADOW_RESYNC_ONLY                (TRC_SHADOW + 15)
112
113/* trace events per subclass */
114#define TRC_HVM_VMENTRY         (TRC_HVM_ENTRYEXIT + 0x01)
115#define TRC_HVM_VMEXIT          (TRC_HVM_ENTRYEXIT + 0x02)
116#define TRC_HVM_VMEXIT64        (TRC_HVM_ENTRYEXIT + TRC_64_FLAG + 0x02)
117#define TRC_HVM_PF_XEN          (TRC_HVM_HANDLER + 0x01)
118#define TRC_HVM_PF_XEN64        (TRC_HVM_HANDLER + TRC_64_FLAG + 0x01)
119#define TRC_HVM_PF_INJECT       (TRC_HVM_HANDLER + 0x02)
120#define TRC_HVM_PF_INJECT64     (TRC_HVM_HANDLER + TRC_64_FLAG + 0x02)
121#define TRC_HVM_INJ_EXC         (TRC_HVM_HANDLER + 0x03)
122#define TRC_HVM_INJ_VIRQ        (TRC_HVM_HANDLER + 0x04)
123#define TRC_HVM_REINJ_VIRQ      (TRC_HVM_HANDLER + 0x05)
124#define TRC_HVM_IO_READ         (TRC_HVM_HANDLER + 0x06)
125#define TRC_HVM_IO_WRITE        (TRC_HVM_HANDLER + 0x07)
126#define TRC_HVM_CR_READ         (TRC_HVM_HANDLER + 0x08)
127#define TRC_HVM_CR_READ64       (TRC_HVM_HANDLER + TRC_64_FLAG + 0x08)
128#define TRC_HVM_CR_WRITE        (TRC_HVM_HANDLER + 0x09)
129#define TRC_HVM_CR_WRITE64      (TRC_HVM_HANDLER + TRC_64_FLAG + 0x09)
130#define TRC_HVM_DR_READ         (TRC_HVM_HANDLER + 0x0A)
131#define TRC_HVM_DR_WRITE        (TRC_HVM_HANDLER + 0x0B)
132#define TRC_HVM_MSR_READ        (TRC_HVM_HANDLER + 0x0C)
133#define TRC_HVM_MSR_WRITE       (TRC_HVM_HANDLER + 0x0D)
134#define TRC_HVM_CPUID           (TRC_HVM_HANDLER + 0x0E)
135#define TRC_HVM_INTR            (TRC_HVM_HANDLER + 0x0F)
136#define TRC_HVM_NMI             (TRC_HVM_HANDLER + 0x10)
137#define TRC_HVM_SMI             (TRC_HVM_HANDLER + 0x11)
138#define TRC_HVM_VMMCALL         (TRC_HVM_HANDLER + 0x12)
139#define TRC_HVM_HLT             (TRC_HVM_HANDLER + 0x13)
140#define TRC_HVM_INVLPG          (TRC_HVM_HANDLER + 0x14)
141#define TRC_HVM_INVLPG64        (TRC_HVM_HANDLER + TRC_64_FLAG + 0x14)
142#define TRC_HVM_MCE             (TRC_HVM_HANDLER + 0x15)
143#define TRC_HVM_IO_ASSIST       (TRC_HVM_HANDLER + 0x16)
144#define TRC_HVM_MMIO_ASSIST     (TRC_HVM_HANDLER + 0x17)
145#define TRC_HVM_CLTS            (TRC_HVM_HANDLER + 0x18)
146#define TRC_HVM_LMSW            (TRC_HVM_HANDLER + 0x19)
147#define TRC_HVM_LMSW64          (TRC_HVM_HANDLER + TRC_64_FLAG + 0x19)
148
149/* This structure represents a single trace buffer record. */
150struct t_rec {
151    uint32_t event:28;
152    uint32_t extra_u32:3;         /* # entries in trailing extra_u32[] array */
153    uint32_t cycles_included:1;   /* u.cycles or u.no_cycles? */
154    union {
155        struct {
156            uint32_t cycles_lo, cycles_hi; /* cycle counter timestamp */
157            uint32_t extra_u32[7];         /* event data items */
158        } cycles;
159        struct {
160            uint32_t extra_u32[7];         /* event data items */
161        } nocycles;
162    } u;
163};
164
165/*
166 * This structure contains the metadata for a single trace buffer.  The head
167 * field, indexes into an array of struct t_rec's.
168 */
169struct t_buf {
170    /* Assume the data buffer size is X.  X is generally not a power of 2.
171     * CONS and PROD are incremented modulo (2*X):
172     *     0 <= cons < 2*X
173     *     0 <= prod < 2*X
174     * This is done because addition modulo X breaks at 2^32 when X is not a
175     * power of 2:
176     *     (((2^32 - 1) % X) + 1) % X != (2^32) % X
177     */
178    uint32_t cons;   /* Offset of next item to be consumed by control tools. */
179    uint32_t prod;   /* Offset of next item to be produced by Xen.           */
180    /*  Records follow immediately after the meta-data header.    */
181};
182
183#endif /* __XEN_PUBLIC_TRACE_H__ */
184
185/*
186 * Local variables:
187 * mode: C
188 * c-set-style: "BSD"
189 * c-basic-offset: 4
190 * tab-width: 4
191 * indent-tabs-mode: nil
192 * End:
193 */
194