/freebsd-9.3-release/contrib/gcc/ |
H A D | varray.h | 200 /* Grow/shrink the virtual array VA to N elements. */ 203 #define VARRAY_GROW(VA, N) ((VA) = varray_grow (VA, N)) 205 #define VARRAY_SIZE(VA) ((VA)->num_elements) 207 #define VARRAY_ACTIVE_SIZE(VA) ((VA)->elements_used) 208 #define VARRAY_POP_ALL(VA) ((VA) [all...] |
/freebsd-9.3-release/contrib/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 206 CCValAssign &VA = RVLocs[i]; local 207 assert(VA.isRegLoc() && "Can only return in registers!"); 209 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), 214 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); 269 CCValAssign &VA = RVLocs[i]; local 270 assert(VA.isRegLoc() && "Can only return in registers!"); 274 switch (VA.getLocInfo()) { 276 OutVal = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), OutVal); 279 OutVal = DAG.getNode(ISD::ZERO_EXTEND, DL, VA 359 CCValAssign &VA = ArgLocs[i]; local 558 CCValAssign &VA = ArgLocs[i]; local 746 CCValAssign &VA = ArgLocs[i]; local 1009 const CCValAssign &VA = ArgLocs[i]; local 1271 CCValAssign &VA = RVLocs[i]; local [all...] |
/freebsd-9.3-release/contrib/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 454 CCValAssign &VA = ArgLocs[i]; local 455 if (VA.isRegLoc()) { 457 EVT RegVT = VA.getLocVT(); 469 RegInfo.addLiveIn(VA.getLocReg(), VReg); 475 if (VA.getLocInfo() == CCValAssign::SExt) 477 DAG.getValueType(VA.getValVT())); 478 else if (VA.getLocInfo() == CCValAssign::ZExt) 480 DAG.getValueType(VA.getValVT())); 482 if (VA.getLocInfo() != CCValAssign::Full) 483 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA 550 CCValAssign &VA = RVLocs[i]; local 606 CCValAssign &VA = ArgLocs[i]; local [all...] |
/freebsd-9.3-release/contrib/binutils/opcodes/ |
H A D | ppc-opc.c | 478 /* The VA field in a VA, VX or VXR form instruction. */ 479 #define VA UI + 1 482 /* The VB field in a VA, VX or VXR form instruction. */ 483 #define VB VA + 1 486 /* The VC field in a VA form instruction. */ 490 /* The VD or VS field in a VA, VX, VXR or X form instruction. */ 504 /* The SHB field in a VA form instruction. */ 1381 /* An VA form instruction. */ 1384 /* The mask for an VA for 477 #define VA macro [all...] |
/freebsd-9.3-release/contrib/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 591 // Value is a value that has been passed to us in the location described by VA 592 // (and so has type VA.getLocVT()). Convert Value to VA.getValVT(), chaining 595 CCValAssign &VA, SDValue Chain, 599 if (VA.getLocInfo() == CCValAssign::SExt) 600 Value = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), Value, 601 DAG.getValueType(VA.getValVT())); 602 else if (VA.getLocInfo() == CCValAssign::ZExt) 603 Value = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Value, 604 DAG.getValueType(VA 594 convertLocVTToValVT(SelectionDAG &DAG, SDLoc DL, CCValAssign &VA, SDValue Chain, SDValue Value) argument 619 convertValVTToLocVT(SelectionDAG &DAG, SDLoc DL, CCValAssign &VA, SDValue Value) argument 657 CCValAssign &VA = ArgLocs[I]; local 758 CCValAssign &VA = ArgLocs[I]; local 809 CCValAssign &VA = ArgLocs[I]; local 910 CCValAssign &VA = RetLocs[I]; local 948 CCValAssign &VA = RetLocs[I]; local [all...] |
/freebsd-9.3-release/contrib/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 334 CCValAssign &VA = RVLocs[i]; local 336 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), OutVals[i], Flag); 340 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); 447 CCValAssign &VA = ArgLocs[i]; local 448 if (VA.isMemLoc()) { 471 CCValAssign &VA = ArgLocs[i]; local 476 switch (VA.getLocInfo()) { 483 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); 486 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA 857 CCValAssign &VA = ArgLocs[i]; local [all...] |
/freebsd-9.3-release/contrib/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 941 CCValAssign &VA = ArgLocs[i]; local 945 switch (VA.getLocInfo()) { 949 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); 952 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); 955 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); 961 if (VA.isRegLoc()) { 962 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); 964 assert(VA.isMemLoc()); 966 int Offset = VA.getLocMemOffset(); 1131 CCValAssign &VA local 1296 CCValAssign &VA = RVLocs[i]; local [all...] |
/freebsd-9.3-release/contrib/llvm/lib/Target/X86/ |
H A D | X86FastISel.cpp | 822 CCValAssign &VA = ValLocs[0]; 825 if (VA.getLocInfo() != CCValAssign::Full) 828 if (!VA.isRegLoc()) 833 if (VA.getLocReg() == X86::ST0 || VA.getLocReg() == X86::ST1) 836 unsigned SrcReg = Reg + VA.getValNo(); 838 EVT DstVT = VA.getValVT(); 862 unsigned DstReg = VA.getLocReg(); 871 RetRegs.push_back(VA.getLocReg()); 2050 CCValAssign &VA local [all...] |
H A D | X86ISelLowering.h | 822 const CCValAssign &VA, MachineFrameInfo *MFI, 826 const CCValAssign &VA,
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H A D | X86ISelLowering.cpp | 1820 CCValAssign &VA = RVLocs[i]; local 1821 assert(VA.isRegLoc() && "Can only return in registers!"); 1826 if (VA.getLocInfo() == CCValAssign::SExt) 1827 ValToCopy = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), ValToCopy); 1828 else if (VA.getLocInfo() == CCValAssign::ZExt) 1829 ValToCopy = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), ValToCopy); 1830 else if (VA.getLocInfo() == CCValAssign::AExt) 1831 ValToCopy = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), ValToCopy); 1832 else if (VA.getLocInfo() == CCValAssign::BCvt) 1833 ValToCopy = DAG.getNode(ISD::BITCAST, dl, VA 1982 CCValAssign &VA = RVLocs[i]; local 2118 LowerMemArgument(SDValue Chain, CallingConv::ID CallConv, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, const CCValAssign &VA, MachineFrameInfo *MFI, unsigned i) const argument 2198 CCValAssign &VA = ArgLocs[i]; local 2443 LowerMemOpCallTo(SDValue Chain, SDValue StackPtr, SDValue Arg, SDLoc dl, SelectionDAG &DAG, const CCValAssign &VA, ISD::ArgFlagsTy Flags) const argument 2592 CCValAssign &VA = ArgLocs[i]; local 2723 CCValAssign &VA = ArgLocs[i]; local 3135 CCValAssign &VA = RVLocs[i]; local 3197 CCValAssign &VA = ArgLocs[i]; local 3226 CCValAssign &VA = ArgLocs[i]; local [all...] |
/freebsd-9.3-release/contrib/llvm/lib/Target/ARM/ |
H A D | ARMFastISel.cpp | 1972 CCValAssign &VA = ArgLocs[i]; local 1973 MVT ArgVT = ArgVTs[VA.getValNo()]; 1980 if (VA.isRegLoc() && !VA.needsCustom()) { 1982 } else if (VA.needsCustom()) { 1984 if (VA.getLocVT() != MVT::f64 || 1986 !VA.isRegLoc() || !ArgLocs[++i].isRegLoc()) 2022 CCValAssign &VA = ArgLocs[i]; local 2023 unsigned Arg = ArgRegs[VA.getValNo()]; 2024 MVT ArgVT = ArgVTs[VA [all...] |
H A D | ARMISelLowering.cpp | 1328 CCValAssign VA = RVLocs[i]; local 1333 assert(!VA.needsCustom() && VA.getLocVT() == MVT::i32 && 1340 if (VA.needsCustom()) { 1342 SDValue Lo = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32, 1346 VA = RVLocs[++i]; // skip ahead to next loc 1347 SDValue Hi = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32, 1353 if (VA.getLocVT() == MVT::v2f64) { 1358 VA = RVLocs[++i]; // skip ahead to next loc 1359 Lo = DAG.getCopyFromReg(Chain, dl, VA 1393 LowerMemOpCallTo(SDValue Chain, SDValue StackPtr, SDValue Arg, SDLoc dl, SelectionDAG &DAG, const CCValAssign &VA, ISD::ArgFlagsTy Flags) const argument 1406 PassF64ArgInRegs(SDLoc dl, SelectionDAG &DAG, SDValue Chain, SDValue &Arg, RegsToPassVector &RegsToPass, CCValAssign &VA, CCValAssign &NextVA, SDValue &StackPtr, SmallVectorImpl<SDValue> &MemOpChains, ISD::ArgFlagsTy Flags) const argument 1500 CCValAssign &VA = ArgLocs[i]; local 2068 CCValAssign &VA = ArgLocs[i]; local 2171 CCValAssign &VA = RVLocs[i]; local 2752 GetF64FormalArgument(CCValAssign &VA, CCValAssign &NextVA, SDValue &Root, SelectionDAG &DAG, SDLoc dl) const argument 2987 CCValAssign &VA = ArgLocs[i]; local [all...] |
H A D | ARMISelLowering.h | 415 CCValAssign &VA, CCValAssign &NextVA, 419 SDValue GetF64FormalArgument(CCValAssign &VA, CCValAssign &NextVA, 427 const CCValAssign &VA,
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/freebsd-9.3-release/contrib/llvm/lib/Target/PowerPC/ |
H A D | PPCFastISel.cpp | 1198 CCValAssign &VA = ArgLocs[I]; local 1199 MVT ArgVT = ArgVTs[VA.getValNo()]; 1204 !VA.isRegLoc() || VA.needsCustom()) 1208 if (VA.getLocInfo() == CCValAssign::BCvt) 1228 CCValAssign &VA = ArgLocs[I]; local 1229 unsigned Arg = ArgRegs[VA.getValNo()]; 1230 MVT ArgVT = ArgVTs[VA.getValNo()]; 1233 switch (VA.getLocInfo()) { 1239 MVT DestVT = VA 1301 CCValAssign &VA = RVLocs[0]; local 1540 CCValAssign &VA = ValLocs[i]; local [all...] |
H A D | PPCISelLowering.cpp | 2013 CCValAssign &VA = ArgLocs[i]; local 2016 if (VA.isRegLoc()) { 2018 EVT ValVT = VA.getValVT(); 2041 unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC); 2047 assert(VA.isMemLoc()); 2049 unsigned ArgSize = VA.getLocVT().getSizeInBits() / 8; 2050 int FI = MFI->CreateFixedObject(ArgSize, VA.getLocMemOffset(), 2055 InVals.push_back(DAG.getLoad(VA.getValVT(), dl, Chain, FIN, 3386 CCValAssign &VA = RVLocs[i]; local 3387 assert(VA 3667 CCValAssign &VA = ArgLocs[i]; local 4543 CCValAssign &VA = RVLocs[i]; local [all...] |
/freebsd-9.3-release/contrib/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 1151 CCValAssign &VA = ArgLocs[i]; local 1162 VA.getLocMemOffset(), 1168 } else if (VA.isRegLoc()) { 1169 MVT RegVT = VA.getLocVT(); 1171 unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC); 1174 } else { // VA.isRegLoc() 1175 assert(VA.isMemLoc()); 1177 int FI = MFI->CreateFixedObject(VA.getLocVT().getSizeInBits()/8, 1178 VA.getLocMemOffset(), true); 1181 ArgValue = DAG.getLoad(VA 1277 CCValAssign &VA = RVLocs[i]; local 1398 CCValAssign &VA = ArgLocs[i]; local 1595 CCValAssign VA = RVLocs[i]; local [all...] |
/freebsd-9.3-release/contrib/llvm/tools/clang/lib/Analysis/ |
H A D | LiveVariables.cpp | 307 for (const VariableArrayType* VA = FindVA(VD->getType()); 308 VA != 0; VA = FindVA(VA->getElementType())) { 309 AddLiveStmt(val.liveStmts, LV.SSetFact, VA->getSizeExpr());
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H A D | CFG.cpp | 1743 for (const VariableArrayType* VA = FindVA(VD->getType().getTypePtr()); 1744 VA != 0; VA = FindVA(VA->getElementType().getTypePtr())) { 1745 if (CFGBlock *newBlock = addStmt(VA->getSizeExpr())) 2632 for (const VariableArrayType *VA =FindVA(E->getArgumentType().getTypePtr()); 2633 VA != 0; VA = FindVA(VA->getElementType().getTypePtr())) 2634 lastBlock = addStmt(VA [all...] |
/freebsd-9.3-release/contrib/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 2368 CCValAssign &VA = ArgLocs[i]; local 2369 MVT ValVT = VA.getValVT(), LocVT = VA.getLocVT(); 2386 switch (VA.getLocInfo()) { 2389 if (VA.isRegLoc()) { 2401 unsigned LocRegLo = VA.getLocReg(); 2422 if (VA.isRegLoc()) { 2423 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); 2428 assert(VA.isMemLoc()); 2432 MemOpChains.push_back(passArgOnStack(StackPtr, VA 2583 CCValAssign &VA = ArgLocs[i]; local 2731 CCValAssign &VA = RVLocs[i]; local [all...] |
/freebsd-9.3-release/contrib/llvm/lib/Target/R600/ |
H A D | SIISelLowering.cpp | 275 CCValAssign &VA = ArgLocs[ArgIdx++]; local 276 EVT VT = VA.getLocVT(); 278 if (VA.isMemLoc()) { 284 36 + VA.getLocMemOffset()); 288 assert(VA.isRegLoc() && "Parameter must be in a register!"); 290 unsigned Reg = VA.getLocReg();
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H A D | R600ISelLowering.cpp | 1359 CCValAssign &VA = ArgLocs[i]; local 1364 unsigned Reg = MF.addLiveIn(VA.getLocReg(), &AMDGPU::R600_Reg128RegClass); 1376 DAG.getConstant(36 + VA.getLocMemOffset(), MVT::i32),
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/freebsd-9.3-release/contrib/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombinePHI.cpp | 878 Value *VA = PN.getIncomingValue(i); local 884 PN.setIncomingValue(j, VA);
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/freebsd-9.3-release/usr.bin/calendar/calendars/ |
H A D | calendar.birthday | 31 01/21 Thomas Jonathan "Stonewall" Jackson born in Clarksburg, VA, 1824
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/freebsd-9.3-release/sys/dev/hptrr/ |
H A D | amd64-elf.hptrr_lib.o.uu | 83 M\;H`````A,D/A=<#``#VA?X````!=0:`?0``>0.`"PCVA:T````$="#'0P@! 201 M`+D`````B>I$B>9,B??H`````(7`#X2S````BT,P28M6$`^VA`((`0``B`4` 247 M55-(@\2`2(M',$B+:"@/MA#&!"0`QD0D`0&)T,#H`@^VP`^VA"C`,P``B$0D 267 M"XE$)`@/MD,*B00D2,?'`````+@`````Z`````"`.P!T'T'VA"2I`````G04 310 M?"0,`'0800^VA"2I````@^`"/`$9P(/@$(/`).L600^VA"2I````@^`"/`$9 314 M0`````!,B60D2$'VA"2I`````@^4P`^VP(E$)"A)C74(2(L\)$B!QU@S``#H 448 M`(@%`````(@!#[:$-P@!``"(!0````!F#[;`9HE!`@^VA#<,`0``B`4````` 583 M0P^VA"4<`0``B`4`````QT-$`0```$/'1"4H`0```$B+'"1,BV0D"$R+;"00 596 M3(GOZ`````!%BW4P1(GP0@^VA"`<` [all...] |
/freebsd-9.3-release/sys/dev/hptmv/ |
H A D | i386-elf.raid.o.uu | 48 MB4=(BE=>@\H!B%=>9@^VA?S]__^#X`'1X(/B_0G"B%=>9HN%_OW__V:)1V"+ 330 M`````(/$"#N=S/[__P^-<@$```^VA)WI_O__B<'!X0D/MH2=ZO[__XG&P>8) 333 MB[7<_O__`T26!%#H_/___X/$$.LJC78`5O^UY/[___^UX/[__P^VA=/^__^+ 336 MA=C^__^[`````(/$"#N=S/[__WUB#[:$G>G^__^)P<'A"0^VA)WJ_O__B<;! 341 M`````(/$"#NUV/[__WU=D`^VA+7I_O__P>`)#[:,M>K^___!X0D/MIRUZ/[_ 347 MF/[__P^VA)7I_O__B<?!YPD/MH25ZO[__\'@"8F%H/[__XJ,E>C^__^(C9_^ 486 M__^Z`````(,X`'43@W@$`'4-@W@(`'4'@W@,`'0&D+H!````A=)T0P^VA:_^ 527 M``")\(A'!P^VA:_^___!X`2+50R-A!#8!P``N@````"#.`!U$H-X!`!U#(-X 1276 M26YS97)T`')E<V5T161M84-H86YN96P`9FQU<VA$;6%1=65U90!R979E<G13
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