/freebsd-9.3-release/contrib/gcc/ |
H A D | fp-test.c | 83 volatile long double D1 = 1.0, D2 = 1.0, D3 = 1.0; variable 182 D1 = -D2; 183 D1 = D2 + D3; 184 D1 = D2 - D3; 185 D1 = D2 * D3; 186 D1 = D2 / D3; 187 D1 += D2; 188 D1 -= D2; 189 D1 *= D2; 190 D1 /= D2; [all...] |
/freebsd-9.3-release/tools/tools/nanobsd/rescue/ |
H A D | merge.sh | 5 D2="/usr/obj/nanobsd.rescue_amd64" 9 dd if=${D2}/_.disk.image of=/dev/${MD}s2 bs=128k
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/freebsd-9.3-release/contrib/llvm/tools/clang/lib/AST/ |
H A D | ASTImporter.cpp | 229 bool IsStructurallyEquivalent(Decl *D1, Decl *D2); 262 Decl *D1, Decl *D2); 853 RecordDecl *D2 = Field2->getType()->castAs<RecordType>()->getDecl(); local 854 return IsStructurallyEquivalent(Context, D1, D2); 952 RecordDecl *D1, RecordDecl *D2) { 953 if (D1->isUnion() != D2->isUnion()) { 955 Context.Diag2(D2->getLocation(), diag::warn_odr_tag_type_inconsistent) 956 << Context.C2.getTypeDeclType(D2); 963 if (D1->isAnonymousStructOrUnion() && D2->isAnonymousStructOrUnion()) { 967 if (Optional<unsigned> Index2 = findAnonymousStructOrUnionIndex(D2)) { 951 IsStructurallyEquivalent(StructuralEquivalenceContext &Context, RecordDecl *D1, RecordDecl *D2) argument 1109 IsStructurallyEquivalent(StructuralEquivalenceContext &Context, EnumDecl *D1, EnumDecl *D2) argument 1196 IsStructurallyEquivalent(StructuralEquivalenceContext &Context, TemplateTypeParmDecl *D1, TemplateTypeParmDecl *D2) argument 1212 IsStructurallyEquivalent(StructuralEquivalenceContext &Context, NonTypeTemplateParmDecl *D1, NonTypeTemplateParmDecl *D2) argument 1240 IsStructurallyEquivalent(StructuralEquivalenceContext &Context, TemplateTemplateParmDecl *D1, TemplateTemplateParmDecl *D2) argument 1258 IsStructurallyEquivalent(StructuralEquivalenceContext &Context, ClassTemplateDecl *D1, ClassTemplateDecl *D2) argument 1273 IsStructurallyEquivalent(StructuralEquivalenceContext &Context, Decl *D1, Decl *D2) argument 1294 IsStructurallyEquivalent(Decl *D1, Decl *D2) argument 1316 Decl *D2 = TentativeEquivalences[D1]; local 2441 EnumDecl *D2 = EnumDecl::Create(Importer.getToContext(), DC, local 2559 RecordDecl *D2 = AdoptDecl; local 4111 ClassTemplateSpecializationDecl *D2 local 4306 VarTemplateSpecializationDecl *D2 = VarTemplate->findSpecialization( local [all...] |
/freebsd-9.3-release/contrib/llvm/lib/Target/Hexagon/ |
H A D | HexagonVarargsCallingConvention.h | 66 Hexagon::D0, Hexagon::D1, Hexagon::D2 122 Hexagon::D0, Hexagon::D1, Hexagon::D2
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H A D | HexagonISelLowering.cpp | 209 Hexagon::D1, Hexagon::D2 219 unsigned Offset = State.AllocateStack(8, 8, Hexagon::D2);
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/freebsd-9.3-release/contrib/llvm/tools/clang/lib/StaticAnalyzer/Checkers/ |
H A D | CStringSyntaxChecker.cpp | 40 if (const DeclRefExpr *D2 = dyn_cast<DeclRefExpr>(A2->IgnoreParenCasts())) 41 return D1->getDecl() == D2->getDecl();
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/freebsd-9.3-release/contrib/llvm/lib/Target/ARM/ |
H A D | ARMExpandPseudoInsts.cpp | 354 unsigned &D1, unsigned &D2, unsigned &D3) { 358 D2 = TRI->getSubReg(Reg, ARM::dsub_2); 363 D2 = TRI->getSubReg(Reg, ARM::dsub_4); 369 D2 = TRI->getSubReg(Reg, ARM::dsub_5); 391 unsigned D0, D1, D2, D3; local 392 GetDSubRegs(DstReg, RegSpc, TRI, D0, D1, D2, D3); 397 MIB.addReg(D2, RegState::Define | getDeadRegState(DstIsDead)); 466 unsigned D0, D1, D2, D3; local 467 GetDSubRegs(SrcReg, RegSpc, TRI, D0, D1, D2, D3); 472 MIB.addReg(D2, getUndefRegStat 352 GetDSubRegs(unsigned Reg, NEONRegSpacing RegSpc, const TargetRegisterInfo *TRI, unsigned &D0, unsigned &D1, unsigned &D2, unsigned &D3) argument 596 unsigned D0, D1, D2, D3; local [all...] |
H A D | ARMAsmPrinter.cpp | 105 unsigned D2 = D1 + 1; local 114 OutStreamer.AddComment("DW_OP_regx for Q register: D2"); 116 EmitULEB128(D2);
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/freebsd-9.3-release/contrib/llvm/lib/Target/Sparc/Disassembler/ |
H A D | SparcDisassembler.cpp | 98 SP::D2, SP::D18, SP::D3, SP::D19,
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/freebsd-9.3-release/contrib/llvm/tools/clang/include/clang/AST/ |
H A D | DeclBase.h | 956 inline bool declaresSameEntity(const Decl *D1, const Decl *D2) { argument 957 if (!D1 || !D2) 960 if (D1 == D2) 963 return D1->getCanonicalDecl() == D2->getCanonicalDecl();
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/freebsd-9.3-release/sys/dev/hptmv/ |
H A D | amd64-elf.raid.o.uu | 115 M````#[=%6D2)Z=/XJ`%T<DR)_^@`````2(G#26/%38NDQJ````!,B2-(B6M` 254 M[0^$Y@```.L*N`````#IV@```$B);0!(B6T(2(M$)!!(B45`9D2)=4B(74I( 436 M#T?/@_D@=0W'!O_____K$F9FD&:01(G0T^#_R(G1T^`)!D2)R"G0.?AS%8U\ 509 M#`!T!;H!````A=)T>D2)^`^VV$B)V$C!X`1(C9PH\`H``$B)[^A&T?__QD`( 510 M`D2(>!!$B'@12(L32(E0%$B+4PA(B5`<28G$2(L0_H*P"0``#[:RL`D``(GQ 536 M[^BKS/__QD`(`D2(>!!$B'@12(N3\`H``$B)4!1)BU0D"$B)4!Q!_\=$.'U* 541 MBT0D:`M#"(E$)&B+1"1L"T,,B40D;$0X?4QT=$B)[^BLR___QD`(`D2(>!!$ 633 M#[>\@$(,``"[`````$&[(````$&\`0```(/Z'W=&#[;#28TT@D2)V2G1.?D/ 634 M1\^#^2!U",<&_____^L-1(G@T^#_R(G1T^`)!D2)V"G0.?AS'(U\%^"Z```` 800 M"&8)10*)WDR)Y^@`````P>`(9@E%!$2)_DR)Y^@`````P>`(9@E%!D2)]D [all...] |
/freebsd-9.3-release/sys/dev/fe/ |
H A D | if_fe.c | 563 #define LNX_CYCLE(D1,D2,D3,D4,K1,K2,K3,K4) \ 564 (LNX_PH(D1,K1,0)|LNX_PH(D2,K2,8)|LNX_PH(D3,K3,16)|LNX_PH(D4,K4,24))
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/freebsd-9.3-release/crypto/openssl/crypto/bn/asm/ |
H A D | pa-risc2.s | 824 CMPB,*>>,N %r4,%r19,$D2 ;offset 0x9d4 846 $D2
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H A D | pa-risc2W.s | 802 CMPB,*=,N %r31,%r6,$D2 ; if ((h>>32) != dh)(forward) div 810 $D2
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/freebsd-9.3-release/contrib/llvm/lib/Target/Sparc/AsmParser/ |
H A D | SparcAsmParser.cpp | 108 Sparc::D0, Sparc::D1, Sparc::D2, Sparc::D3,
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/freebsd-9.3-release/sys/dev/hptrr/ |
H A D | amd64-elf.hptrr_lib.o.uu | 217 MBWLHZ`````#K$D2)X@^VPDC'A,/X"P```````+K_____]D4``G0-#[8#C02` 237 M`````+H@````2(GP9F9FD(@(2/_`2/_*=?9,B4X828M`*$B)!D2(5@P/MD<% 329 M)!`)T&:)1"1(9D2)?"1&QD0D3D!(C50D(`^V="0?2(L\).@`````B<*%P`^% 778 MA)T!``"+1"04@^`/@_@$=!"X`0```(G9T^!F"40D!NLV1`^V\T2)\D2)[DR) 1281 M2(/$(,-F9F:09F:02(/L*$B)7"0(3(ED)!!,B6PD&$R)="0@2(G[1`^V]D2) 2003 M]D2)]^A9[O__08G$18UL)"A$B?9(B=_H!N___T6)[4B+0Q!"QP0H!````$B+ 2735 M9F:09F:02(/L*$B)7"0(3(ED)!!,B6PD&$R)="0@2(G[1`^V]D2)]^A9[O__ 2984 M!0````!!B<.#X&*#^&)T&D2)V(/(8D&)@O`$`0!!BX+P!`$`B04`````08N" 3053 M`(E#'$C!Z"")0QB)\,'@"$B82(G"2`.5L#,``$B)4Q!(`X6X,P``B4,D2,'H 3214 M````.$\"=D2 [all...] |
/freebsd-9.3-release/contrib/llvm/lib/Target/AArch64/AsmParser/ |
H A D | AArch64AsmParser.cpp | 1675 .Case("v2", IsVec128 ? AArch64::Q2 : AArch64::D2)
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/freebsd-9.3-release/sys/contrib/dev/uath/ |
H A D | ar5523.bin.uu | 1198 MOP``C((;4!1`__*/OP``D2,`/X$B`#\D9@`!``8>`"A"``,00/_K``,>`R0" 1492 M`"1"__\`1!`F``<@P`""$`0`8A@D`(,8!@$H$"$!`Q@&`6,8!`"H*",D2?_X 1809 MED@=TH^G``".,``(``1(0`$D2"$PI0__`J`@(0!`^`D"X#`ACB,`"#(0?_\" 2095 M'=*,8@````1(0`$D2"$PI0__`6`@(0%`,"$`0/@)```X(8X#``@D!(``,$)_ 2986 M0``=+&(`%0`%$8(D2P`X``L0P`&"$"$D2@`(C4<`#%#J_QTE:P`!C.(`!"0# 3007 M`"",@P`$)`(`&*#"`"BLPP`$`^``"*S#`"2,@@`,)`/_\#P*$1$D2?_(`2-(
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/freebsd-9.3-release/contrib/llvm/tools/clang/lib/Sema/ |
H A D | SemaChecking.cpp | 3886 if (const DeclRefExpr *D2 = dyn_cast_or_null<DeclRefExpr>(E2)) 3887 return D1->getDecl() == D2->getDecl();
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H A D | SemaDeclCXX.cpp | 7040 IsEquivalentForUsingDecl(ASTContext &Context, NamedDecl *D1, NamedDecl *D2) { argument 7041 if (D1->getCanonicalDecl() == D2->getCanonicalDecl()) 7045 if (TypedefNameDecl *TD2 = dyn_cast<TypedefNameDecl>(D2))
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/freebsd-9.3-release/sys/contrib/dev/ipw/ |
H A D | ipw2100-1.3.fw.uu | 710 M`'!*```@`&T2``!M$@``C!(``&T2``",$@``1Q(``"D2```L$@``D$H``"`` 2195 M`"```"<(`/W@5TY$5D2"&0`@4"8!`"````1!4'2$!A!\@"8(`(/F5P(!`"`0
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/freebsd-9.3-release/contrib/llvm/lib/Target/ARM/Disassembler/ |
H A D | ARMDisassembler.cpp | 1002 ARM::D0, ARM::D1, ARM::D2, ARM::D3,
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/freebsd-9.3-release/contrib/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 3020 case ARM::Q1: return ARM::D2;
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