1/*- 2 * All Rights Reserved, Copyright (C) Fujitsu Limited 1995 3 * 4 * This software may be used, modified, copied, distributed, and sold, in 5 * both source and binary form provided that the above copyright, these 6 * terms and the following disclaimer are retained. The name of the author 7 * and/or the contributor may not be used to endorse or promote products 8 * derived from this software without specific prior written permission. 9 * 10 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND THE CONTRIBUTOR ``AS IS'' AND 11 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 12 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 13 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR THE CONTRIBUTOR BE LIABLE 14 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 15 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 16 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION. 17 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 18 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 19 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 20 * SUCH DAMAGE. 21 */ 22 23#include <sys/cdefs.h> 24__FBSDID("$FreeBSD$"); 25 26/* 27 * 28 * Device driver for Fujitsu MB86960A/MB86965A based Ethernet cards. 29 * Contributed by M. Sekiguchi. <seki@sysrap.cs.fujitsu.co.jp> 30 * 31 * This version is intended to be a generic template for various 32 * MB86960A/MB86965A based Ethernet cards. It currently supports 33 * Fujitsu FMV-180 series for ISA and Allied-Telesis AT1700/RE2000 34 * series for ISA, as well as Fujitsu MBH10302 PC Card. 35 * There are some currently- 36 * unused hooks embedded, which are primarily intended to support 37 * other types of Ethernet cards, but the author is not sure whether 38 * they are useful. 39 * 40 * This version also includes some alignments to support RE1000, 41 * C-NET(98)P2 and so on. These cards are not for AT-compatibles, 42 * but for NEC PC-98 bus -- a proprietary bus architecture available 43 * only in Japan. Confusingly, it is different from the Microsoft's 44 * PC98 architecture. :-{ 45 * Further work for PC-98 version will be available as a part of 46 * FreeBSD(98) project. 47 * 48 * This software is a derivative work of if_ed.c version 1.56 by David 49 * Greenman available as a part of FreeBSD 2.0 RELEASE source distribution. 50 * 51 * The following lines are retained from the original if_ed.c: 52 * 53 * Copyright (C) 1993, David Greenman. This software may be used, modified, 54 * copied, distributed, and sold, in both source and binary form provided 55 * that the above copyright and these terms are retained. Under no 56 * circumstances is the author responsible for the proper functioning 57 * of this software, nor does the author assume any responsibility 58 * for damages incurred with its use. 59 */ 60 61/* 62 * TODO: 63 * o To support ISA PnP auto configuration for FMV-183/184. 64 * o To support REX-9886/87(PC-98 only). 65 * o To reconsider mbuf usage. 66 * o To reconsider transmission buffer usage, including 67 * transmission buffer size (currently 4KB x 2) and pros-and- 68 * cons of multiple frame transmission. 69 * o To test IPX codes. 70 * o To test new-bus frontend. 71 */ 72 73#include <sys/param.h> 74#include <sys/kernel.h> 75#include <sys/systm.h> 76#include <sys/socket.h> 77#include <sys/sockio.h> 78#include <sys/mbuf.h> 79 80#include <sys/bus.h> 81#include <machine/bus.h> 82#include <sys/rman.h> 83 84#include <net/ethernet.h> 85#include <net/if.h> 86#include <net/if_dl.h> 87#include <net/if_mib.h> 88#include <net/if_media.h> 89#include <net/if_types.h> 90 91#include <netinet/in.h> 92#include <netinet/if_ether.h> 93 94#include <net/bpf.h> 95 96#include <dev/fe/mb86960.h> 97#include <dev/fe/if_fereg.h> 98#include <dev/fe/if_fevar.h> 99 100/* 101 * Transmit just one packet per a "send" command to 86960. 102 * This option is intended for performance test. An EXPERIMENTAL option. 103 */ 104#ifndef FE_SINGLE_TRANSMISSION 105#define FE_SINGLE_TRANSMISSION 0 106#endif 107 108/* 109 * Maximum loops when interrupt. 110 * This option prevents an infinite loop due to hardware failure. 111 * (Some laptops make an infinite loop after PC Card is ejected.) 112 */ 113#ifndef FE_MAX_LOOP 114#define FE_MAX_LOOP 0x800 115#endif 116 117/* 118 * Device configuration flags. 119 */ 120 121/* DLCR6 settings. */ 122#define FE_FLAGS_DLCR6_VALUE 0x007F 123 124/* Force DLCR6 override. */ 125#define FE_FLAGS_OVERRIDE_DLCR6 0x0080 126 127 128devclass_t fe_devclass; 129 130/* 131 * Special filter values. 132 */ 133static struct fe_filter const fe_filter_nothing = { FE_FILTER_NOTHING }; 134static struct fe_filter const fe_filter_all = { FE_FILTER_ALL }; 135 136/* Standard driver entry points. These can be static. */ 137static void fe_init (void *); 138static void fe_init_locked (struct fe_softc *); 139static driver_intr_t fe_intr; 140static int fe_ioctl (struct ifnet *, u_long, caddr_t); 141static void fe_start (struct ifnet *); 142static void fe_start_locked (struct ifnet *); 143static void fe_watchdog (void *); 144static int fe_medchange (struct ifnet *); 145static void fe_medstat (struct ifnet *, struct ifmediareq *); 146 147/* Local functions. Order of declaration is confused. FIXME. */ 148static int fe_get_packet ( struct fe_softc *, u_short ); 149static void fe_tint ( struct fe_softc *, u_char ); 150static void fe_rint ( struct fe_softc *, u_char ); 151static void fe_xmit ( struct fe_softc * ); 152static void fe_write_mbufs ( struct fe_softc *, struct mbuf * ); 153static void fe_setmode ( struct fe_softc * ); 154static void fe_loadmar ( struct fe_softc * ); 155 156#ifdef DIAGNOSTIC 157static void fe_emptybuffer ( struct fe_softc * ); 158#endif 159 160/* 161 * Fe driver specific constants which relate to 86960/86965. 162 */ 163 164/* Interrupt masks */ 165#define FE_TMASK ( FE_D2_COLL16 | FE_D2_TXDONE ) 166#define FE_RMASK ( FE_D3_OVRFLO | FE_D3_CRCERR \ 167 | FE_D3_ALGERR | FE_D3_SRTPKT | FE_D3_PKTRDY ) 168 169/* Maximum number of iterations for a receive interrupt. */ 170#define FE_MAX_RECV_COUNT ( ( 65536 - 2048 * 2 ) / 64 ) 171 /* 172 * Maximum size of SRAM is 65536, 173 * minimum size of transmission buffer in fe is 2x2KB, 174 * and minimum amount of received packet including headers 175 * added by the chip is 64 bytes. 176 * Hence FE_MAX_RECV_COUNT is the upper limit for number 177 * of packets in the receive buffer. 178 */ 179 180/* 181 * Miscellaneous definitions not directly related to hardware. 182 */ 183 184/* The following line must be delete when "net/if_media.h" support it. */ 185#ifndef IFM_10_FL 186#define IFM_10_FL /* 13 */ IFM_10_5 187#endif 188 189#if 0 190/* Mapping between media bitmap (in fe_softc.mbitmap) and ifm_media. */ 191static int const bit2media [] = { 192 IFM_HDX | IFM_ETHER | IFM_AUTO, 193 IFM_HDX | IFM_ETHER | IFM_MANUAL, 194 IFM_HDX | IFM_ETHER | IFM_10_T, 195 IFM_HDX | IFM_ETHER | IFM_10_2, 196 IFM_HDX | IFM_ETHER | IFM_10_5, 197 IFM_HDX | IFM_ETHER | IFM_10_FL, 198 IFM_FDX | IFM_ETHER | IFM_10_T, 199 /* More can be come here... */ 200 0 201}; 202#else 203/* Mapping between media bitmap (in fe_softc.mbitmap) and ifm_media. */ 204static int const bit2media [] = { 205 IFM_ETHER | IFM_AUTO, 206 IFM_ETHER | IFM_MANUAL, 207 IFM_ETHER | IFM_10_T, 208 IFM_ETHER | IFM_10_2, 209 IFM_ETHER | IFM_10_5, 210 IFM_ETHER | IFM_10_FL, 211 IFM_ETHER | IFM_10_T, 212 /* More can be come here... */ 213 0 214}; 215#endif 216 217/* 218 * Check for specific bits in specific registers have specific values. 219 * A common utility function called from various sub-probe routines. 220 */ 221int 222fe_simple_probe (struct fe_softc const * sc, 223 struct fe_simple_probe_struct const * sp) 224{ 225 struct fe_simple_probe_struct const *p; 226 int8_t bits; 227 228 for (p = sp; p->mask != 0; p++) { 229 bits = fe_inb(sc, p->port); 230 printf("port %d, mask %x, bits %x read %x\n", p->port, 231 p->mask, p->bits, bits); 232 if ((bits & p->mask) != p->bits) 233 return 0; 234 } 235 return 1; 236} 237 238/* Test if a given 6 byte value is a valid Ethernet station (MAC) 239 address. "Vendor" is an expected vendor code (first three bytes,) 240 or a zero when nothing expected. */ 241int 242fe_valid_Ether_p (u_char const * addr, unsigned vendor) 243{ 244#ifdef FE_DEBUG 245 printf("fe?: validating %6D against %06x\n", addr, ":", vendor); 246#endif 247 248 /* All zero is not allowed as a vendor code. */ 249 if (addr[0] == 0 && addr[1] == 0 && addr[2] == 0) return 0; 250 251 switch (vendor) { 252 case 0x000000: 253 /* Legal Ethernet address (stored in ROM) must have 254 its Group and Local bits cleared. */ 255 if ((addr[0] & 0x03) != 0) return 0; 256 break; 257 case 0x020000: 258 /* Same as above, but a local address is allowed in 259 this context. */ 260 if (ETHER_IS_MULTICAST(addr)) return 0; 261 break; 262 default: 263 /* Make sure the vendor part matches if one is given. */ 264 if ( addr[0] != ((vendor >> 16) & 0xFF) 265 || addr[1] != ((vendor >> 8) & 0xFF) 266 || addr[2] != ((vendor ) & 0xFF)) return 0; 267 break; 268 } 269 270 /* Host part must not be all-zeros nor all-ones. */ 271 if (addr[3] == 0xFF && addr[4] == 0xFF && addr[5] == 0xFF) return 0; 272 if (addr[3] == 0x00 && addr[4] == 0x00 && addr[5] == 0x00) return 0; 273 274 /* Given addr looks like an Ethernet address. */ 275 return 1; 276} 277 278/* Fill our softc struct with default value. */ 279void 280fe_softc_defaults (struct fe_softc *sc) 281{ 282 /* Prepare for typical register prototypes. We assume a 283 "typical" board has <32KB> of <fast> SRAM connected with a 284 <byte-wide> data lines. */ 285 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL; 286 sc->proto_dlcr5 = 0; 287 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB 288 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns; 289 sc->proto_dlcr7 = FE_D7_BYTSWP_LH; 290 sc->proto_bmpr13 = 0; 291 292 /* Assume the probe process (to be done later) is stable. */ 293 sc->stability = 0; 294 295 /* A typical board needs no hooks. */ 296 sc->init = NULL; 297 sc->stop = NULL; 298 299 /* Assume the board has no software-controllable media selection. */ 300 sc->mbitmap = MB_HM; 301 sc->defmedia = MB_HM; 302 sc->msel = NULL; 303} 304 305/* Common error reporting routine used in probe routines for 306 "soft configured IRQ"-type boards. */ 307void 308fe_irq_failure (char const *name, int unit, int irq, char const *list) 309{ 310 printf("fe%d: %s board is detected, but %s IRQ was given\n", 311 unit, name, (irq == NO_IRQ ? "no" : "invalid")); 312 if (list != NULL) { 313 printf("fe%d: specify an IRQ from %s in kernel config\n", 314 unit, list); 315 } 316} 317 318/* 319 * Hardware (vendor) specific hooks. 320 */ 321 322/* 323 * Generic media selection scheme for MB86965 based boards. 324 */ 325void 326fe_msel_965 (struct fe_softc *sc) 327{ 328 u_char b13; 329 330 /* Find the appropriate bits for BMPR13 tranceiver control. */ 331 switch (IFM_SUBTYPE(sc->media.ifm_media)) { 332 case IFM_AUTO: b13 = FE_B13_PORT_AUTO | FE_B13_TPTYPE_UTP; break; 333 case IFM_10_T: b13 = FE_B13_PORT_TP | FE_B13_TPTYPE_UTP; break; 334 default: b13 = FE_B13_PORT_AUI; break; 335 } 336 337 /* Write it into the register. It takes effect immediately. */ 338 fe_outb(sc, FE_BMPR13, sc->proto_bmpr13 | b13); 339} 340 341 342/* 343 * Fujitsu MB86965 JLI mode support routines. 344 */ 345 346/* 347 * Routines to read all bytes from the config EEPROM through MB86965A. 348 * It is a MicroWire (3-wire) serial EEPROM with 6-bit address. 349 * (93C06 or 93C46.) 350 */ 351static void 352fe_strobe_eeprom_jli (struct fe_softc *sc, u_short bmpr16) 353{ 354 /* 355 * We must guarantee 1us (or more) interval to access slow 356 * EEPROMs. The following redundant code provides enough 357 * delay with ISA timing. (Even if the bus clock is "tuned.") 358 * Some modification will be needed on faster busses. 359 */ 360 fe_outb(sc, bmpr16, FE_B16_SELECT); 361 fe_outb(sc, bmpr16, FE_B16_SELECT | FE_B16_CLOCK); 362 fe_outb(sc, bmpr16, FE_B16_SELECT | FE_B16_CLOCK); 363 fe_outb(sc, bmpr16, FE_B16_SELECT); 364} 365 366void 367fe_read_eeprom_jli (struct fe_softc * sc, u_char * data) 368{ 369 u_char n, val, bit; 370 u_char save16, save17; 371 372 /* Save the current value of the EEPROM interface registers. */ 373 save16 = fe_inb(sc, FE_BMPR16); 374 save17 = fe_inb(sc, FE_BMPR17); 375 376 /* Read bytes from EEPROM; two bytes per an iteration. */ 377 for (n = 0; n < JLI_EEPROM_SIZE / 2; n++) { 378 379 /* Reset the EEPROM interface. */ 380 fe_outb(sc, FE_BMPR16, 0x00); 381 fe_outb(sc, FE_BMPR17, 0x00); 382 383 /* Start EEPROM access. */ 384 fe_outb(sc, FE_BMPR16, FE_B16_SELECT); 385 fe_outb(sc, FE_BMPR17, FE_B17_DATA); 386 fe_strobe_eeprom_jli(sc, FE_BMPR16); 387 388 /* Pass the iteration count as well as a READ command. */ 389 val = 0x80 | n; 390 for (bit = 0x80; bit != 0x00; bit >>= 1) { 391 fe_outb(sc, FE_BMPR17, (val & bit) ? FE_B17_DATA : 0); 392 fe_strobe_eeprom_jli(sc, FE_BMPR16); 393 } 394 fe_outb(sc, FE_BMPR17, 0x00); 395 396 /* Read a byte. */ 397 val = 0; 398 for (bit = 0x80; bit != 0x00; bit >>= 1) { 399 fe_strobe_eeprom_jli(sc, FE_BMPR16); 400 if (fe_inb(sc, FE_BMPR17) & FE_B17_DATA) 401 val |= bit; 402 } 403 *data++ = val; 404 405 /* Read one more byte. */ 406 val = 0; 407 for (bit = 0x80; bit != 0x00; bit >>= 1) { 408 fe_strobe_eeprom_jli(sc, FE_BMPR16); 409 if (fe_inb(sc, FE_BMPR17) & FE_B17_DATA) 410 val |= bit; 411 } 412 *data++ = val; 413 } 414 415#if 0 416 /* Reset the EEPROM interface, again. */ 417 fe_outb(sc, FE_BMPR16, 0x00); 418 fe_outb(sc, FE_BMPR17, 0x00); 419#else 420 /* Make sure to restore the original value of EEPROM interface 421 registers, since we are not yet sure we have MB86965A on 422 the address. */ 423 fe_outb(sc, FE_BMPR17, save17); 424 fe_outb(sc, FE_BMPR16, save16); 425#endif 426 427#if 1 428 /* Report what we got. */ 429 if (bootverbose) { 430 int i; 431 data -= JLI_EEPROM_SIZE; 432 for (i = 0; i < JLI_EEPROM_SIZE; i += 16) { 433 if_printf(sc->ifp, 434 "EEPROM(JLI):%3x: %16D\n", i, data + i, " "); 435 } 436 } 437#endif 438} 439 440void 441fe_init_jli (struct fe_softc * sc) 442{ 443 /* "Reset" by writing into a magic location. */ 444 DELAY(200); 445 fe_outb(sc, 0x1E, fe_inb(sc, 0x1E)); 446 DELAY(300); 447} 448 449 450/* 451 * SSi 78Q8377A support routines. 452 */ 453 454/* 455 * Routines to read all bytes from the config EEPROM through 78Q8377A. 456 * It is a MicroWire (3-wire) serial EEPROM with 8-bit address. (I.e., 457 * 93C56 or 93C66.) 458 * 459 * As I don't have SSi manuals, (hmm, an old song again!) I'm not exactly 460 * sure the following code is correct... It is just stolen from the 461 * C-NET(98)P2 support routine in FreeBSD(98). 462 */ 463 464void 465fe_read_eeprom_ssi (struct fe_softc *sc, u_char *data) 466{ 467 u_char val, bit; 468 int n; 469 u_char save6, save7, save12; 470 471 /* Save the current value for the DLCR registers we are about 472 to destroy. */ 473 save6 = fe_inb(sc, FE_DLCR6); 474 save7 = fe_inb(sc, FE_DLCR7); 475 476 /* Put the 78Q8377A into a state that we can access the EEPROM. */ 477 fe_outb(sc, FE_DLCR6, 478 FE_D6_BBW_WORD | FE_D6_SBW_WORD | FE_D6_DLC_DISABLE); 479 fe_outb(sc, FE_DLCR7, 480 FE_D7_BYTSWP_LH | FE_D7_RBS_BMPR | FE_D7_RDYPNS | FE_D7_POWER_UP); 481 482 /* Save the current value for the BMPR12 register, too. */ 483 save12 = fe_inb(sc, FE_DLCR12); 484 485 /* Read bytes from EEPROM; two bytes per an iteration. */ 486 for (n = 0; n < SSI_EEPROM_SIZE / 2; n++) { 487 488 /* Start EEPROM access */ 489 fe_outb(sc, FE_DLCR12, SSI_EEP); 490 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL); 491 492 /* Send the following four bits to the EEPROM in the 493 specified order: a dummy bit, a start bit, and 494 command bits (10) for READ. */ 495 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL ); 496 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK ); /* 0 */ 497 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_DAT); 498 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK | SSI_DAT); /* 1 */ 499 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_DAT); 500 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK | SSI_DAT); /* 1 */ 501 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL ); 502 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK ); /* 0 */ 503 504 /* Pass the iteration count to the chip. */ 505 for (bit = 0x80; bit != 0x00; bit >>= 1) { 506 val = ( n & bit ) ? SSI_DAT : 0; 507 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | val); 508 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK | val); 509 } 510 511 /* Read a byte. */ 512 val = 0; 513 for (bit = 0x80; bit != 0x00; bit >>= 1) { 514 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL); 515 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK); 516 if (fe_inb(sc, FE_DLCR12) & SSI_DIN) 517 val |= bit; 518 } 519 *data++ = val; 520 521 /* Read one more byte. */ 522 val = 0; 523 for (bit = 0x80; bit != 0x00; bit >>= 1) { 524 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL); 525 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK); 526 if (fe_inb(sc, FE_DLCR12) & SSI_DIN) 527 val |= bit; 528 } 529 *data++ = val; 530 531 fe_outb(sc, FE_DLCR12, SSI_EEP); 532 } 533 534 /* Reset the EEPROM interface. (For now.) */ 535 fe_outb(sc, FE_DLCR12, 0x00); 536 537 /* Restore the saved register values, for the case that we 538 didn't have 78Q8377A at the given address. */ 539 fe_outb(sc, FE_DLCR12, save12); 540 fe_outb(sc, FE_DLCR7, save7); 541 fe_outb(sc, FE_DLCR6, save6); 542 543#if 1 544 /* Report what we got. */ 545 if (bootverbose) { 546 int i; 547 data -= SSI_EEPROM_SIZE; 548 for (i = 0; i < SSI_EEPROM_SIZE; i += 16) { 549 if_printf(sc->ifp, 550 "EEPROM(SSI):%3x: %16D\n", i, data + i, " "); 551 } 552 } 553#endif 554} 555 556/* 557 * TDK/LANX boards support routines. 558 */ 559 560/* It is assumed that the CLK line is low and SDA is high (float) upon entry. */ 561#define LNX_PH(D,K,N) \ 562 ((LNX_SDA_##D | LNX_CLK_##K) << N) 563#define LNX_CYCLE(D1,D2,D3,D4,K1,K2,K3,K4) \ 564 (LNX_PH(D1,K1,0)|LNX_PH(D2,K2,8)|LNX_PH(D3,K3,16)|LNX_PH(D4,K4,24)) 565 566#define LNX_CYCLE_START LNX_CYCLE(HI,LO,LO,HI, HI,HI,LO,LO) 567#define LNX_CYCLE_STOP LNX_CYCLE(LO,LO,HI,HI, LO,HI,HI,LO) 568#define LNX_CYCLE_HI LNX_CYCLE(HI,HI,HI,HI, LO,HI,LO,LO) 569#define LNX_CYCLE_LO LNX_CYCLE(LO,LO,LO,HI, LO,HI,LO,LO) 570#define LNX_CYCLE_INIT LNX_CYCLE(LO,HI,HI,HI, LO,LO,LO,LO) 571 572static void 573fe_eeprom_cycle_lnx (struct fe_softc *sc, u_short reg20, u_long cycle) 574{ 575 fe_outb(sc, reg20, (cycle ) & 0xFF); 576 DELAY(15); 577 fe_outb(sc, reg20, (cycle >> 8) & 0xFF); 578 DELAY(15); 579 fe_outb(sc, reg20, (cycle >> 16) & 0xFF); 580 DELAY(15); 581 fe_outb(sc, reg20, (cycle >> 24) & 0xFF); 582 DELAY(15); 583} 584 585static u_char 586fe_eeprom_receive_lnx (struct fe_softc *sc, u_short reg20) 587{ 588 u_char dat; 589 590 fe_outb(sc, reg20, LNX_CLK_HI | LNX_SDA_FL); 591 DELAY(15); 592 dat = fe_inb(sc, reg20); 593 fe_outb(sc, reg20, LNX_CLK_LO | LNX_SDA_FL); 594 DELAY(15); 595 return (dat & LNX_SDA_IN); 596} 597 598void 599fe_read_eeprom_lnx (struct fe_softc *sc, u_char *data) 600{ 601 int i; 602 u_char n, bit, val; 603 u_char save20; 604 u_short reg20 = 0x14; 605 606 save20 = fe_inb(sc, reg20); 607 608 /* NOTE: DELAY() timing constants are approximately three 609 times longer (slower) than the required minimum. This is 610 to guarantee a reliable operation under some tough 611 conditions... Fortunately, this routine is only called 612 during the boot phase, so the speed is less important than 613 stability. */ 614 615#if 1 616 /* Reset the X24C01's internal state machine and put it into 617 the IDLE state. We usually don't need this, but *if* 618 someone (e.g., probe routine of other driver) write some 619 garbage into the register at 0x14, synchronization will be 620 lost, and the normal EEPROM access protocol won't work. 621 Moreover, as there are no easy way to reset, we need a 622 _manoeuvre_ here. (It even lacks a reset pin, so pushing 623 the RESET button on the PC doesn't help!) */ 624 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_INIT); 625 for (i = 0; i < 10; i++) 626 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_START); 627 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_STOP); 628 DELAY(10000); 629#endif 630 631 /* Issue a start condition. */ 632 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_START); 633 634 /* Send seven bits of the starting address (zero, in this 635 case) and a command bit for READ. */ 636 val = 0x01; 637 for (bit = 0x80; bit != 0x00; bit >>= 1) { 638 if (val & bit) { 639 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_HI); 640 } else { 641 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_LO); 642 } 643 } 644 645 /* Receive an ACK bit. */ 646 if (fe_eeprom_receive_lnx(sc, reg20)) { 647 /* ACK was not received. EEPROM is not present (i.e., 648 this board was not a TDK/LANX) or not working 649 properly. */ 650 if (bootverbose) { 651 if_printf(sc->ifp, 652 "no ACK received from EEPROM(LNX)\n"); 653 } 654 /* Clear the given buffer to indicate we could not get 655 any info. and return. */ 656 bzero(data, LNX_EEPROM_SIZE); 657 goto RET; 658 } 659 660 /* Read bytes from EEPROM. */ 661 for (n = 0; n < LNX_EEPROM_SIZE; n++) { 662 663 /* Read a byte and store it into the buffer. */ 664 val = 0x00; 665 for (bit = 0x80; bit != 0x00; bit >>= 1) { 666 if (fe_eeprom_receive_lnx(sc, reg20)) 667 val |= bit; 668 } 669 *data++ = val; 670 671 /* Acknowledge if we have to read more. */ 672 if (n < LNX_EEPROM_SIZE - 1) { 673 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_LO); 674 } 675 } 676 677 /* Issue a STOP condition, de-activating the clock line. 678 It will be safer to keep the clock line low than to leave 679 it high. */ 680 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_STOP); 681 682 RET: 683 fe_outb(sc, reg20, save20); 684 685#if 1 686 /* Report what we got. */ 687 if (bootverbose) { 688 data -= LNX_EEPROM_SIZE; 689 for (i = 0; i < LNX_EEPROM_SIZE; i += 16) { 690 if_printf(sc->ifp, 691 "EEPROM(LNX):%3x: %16D\n", i, data + i, " "); 692 } 693 } 694#endif 695} 696 697void 698fe_init_lnx (struct fe_softc * sc) 699{ 700 /* Reset the 86960. Do we need this? FIXME. */ 701 fe_outb(sc, 0x12, 0x06); 702 DELAY(100); 703 fe_outb(sc, 0x12, 0x07); 704 DELAY(100); 705 706 /* Setup IRQ control register on the ASIC. */ 707 fe_outb(sc, 0x14, sc->priv_info); 708} 709 710 711/* 712 * Ungermann-Bass boards support routine. 713 */ 714void 715fe_init_ubn (struct fe_softc * sc) 716{ 717 /* Do we need this? FIXME. */ 718 fe_outb(sc, FE_DLCR7, 719 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP); 720 fe_outb(sc, 0x18, 0x00); 721 DELAY(200); 722 723 /* Setup IRQ control register on the ASIC. */ 724 fe_outb(sc, 0x14, sc->priv_info); 725} 726 727 728/* 729 * Install interface into kernel networking data structures 730 */ 731int 732fe_attach (device_t dev) 733{ 734 struct fe_softc *sc = device_get_softc(dev); 735 struct ifnet *ifp; 736 int flags = device_get_flags(dev); 737 int b, error; 738 739 ifp = sc->ifp = if_alloc(IFT_ETHER); 740 if (ifp == NULL) { 741 device_printf(dev, "can not ifalloc\n"); 742 fe_release_resource(dev); 743 return (ENOSPC); 744 } 745 746 mtx_init(&sc->lock, device_get_nameunit(dev), MTX_NETWORK_LOCK, 747 MTX_DEF); 748 callout_init_mtx(&sc->timer, &sc->lock, 0); 749 750 /* 751 * Initialize ifnet structure 752 */ 753 ifp->if_softc = sc; 754 if_initname(sc->ifp, device_get_name(dev), device_get_unit(dev)); 755 ifp->if_start = fe_start; 756 ifp->if_ioctl = fe_ioctl; 757 ifp->if_init = fe_init; 758 ifp->if_linkmib = &sc->mibdata; 759 ifp->if_linkmiblen = sizeof (sc->mibdata); 760 761#if 0 /* I'm not sure... */ 762 sc->mibdata.dot3Compliance = DOT3COMPLIANCE_COLLS; 763#endif 764 765 /* 766 * Set fixed interface flags. 767 */ 768 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 769 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 770 771#if FE_SINGLE_TRANSMISSION 772 /* Override txb config to allocate minimum. */ 773 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ 774 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB; 775#endif 776 777 /* Modify hardware config if it is requested. */ 778 if (flags & FE_FLAGS_OVERRIDE_DLCR6) 779 sc->proto_dlcr6 = flags & FE_FLAGS_DLCR6_VALUE; 780 781 /* Find TX buffer size, based on the hardware dependent proto. */ 782 switch (sc->proto_dlcr6 & FE_D6_TXBSIZ) { 783 case FE_D6_TXBSIZ_2x2KB: sc->txb_size = 2048; break; 784 case FE_D6_TXBSIZ_2x4KB: sc->txb_size = 4096; break; 785 case FE_D6_TXBSIZ_2x8KB: sc->txb_size = 8192; break; 786 default: 787 /* Oops, we can't work with single buffer configuration. */ 788 if (bootverbose) { 789 if_printf(sc->ifp, 790 "strange TXBSIZ config; fixing\n"); 791 } 792 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ; 793 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB; 794 sc->txb_size = 2048; 795 break; 796 } 797 798 /* Initialize the if_media interface. */ 799 ifmedia_init(&sc->media, 0, fe_medchange, fe_medstat); 800 for (b = 0; bit2media[b] != 0; b++) { 801 if (sc->mbitmap & (1 << b)) { 802 ifmedia_add(&sc->media, bit2media[b], 0, NULL); 803 } 804 } 805 for (b = 0; bit2media[b] != 0; b++) { 806 if (sc->defmedia & (1 << b)) { 807 ifmedia_set(&sc->media, bit2media[b]); 808 break; 809 } 810 } 811#if 0 /* Turned off; this is called later, when the interface UPs. */ 812 fe_medchange(sc); 813#endif 814 815 /* Attach and stop the interface. */ 816 FE_LOCK(sc); 817 fe_stop(sc); 818 FE_UNLOCK(sc); 819 ether_ifattach(sc->ifp, sc->enaddr); 820 821 error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET | INTR_MPSAFE, 822 NULL, fe_intr, sc, &sc->irq_handle); 823 if (error) { 824 ether_ifdetach(ifp); 825 mtx_destroy(&sc->lock); 826 if_free(ifp); 827 fe_release_resource(dev); 828 return ENXIO; 829 } 830 831 /* Print additional info when attached. */ 832 device_printf(dev, "type %s%s\n", sc->typestr, 833 (sc->proto_dlcr4 & FE_D4_DSC) ? ", full duplex" : ""); 834 if (bootverbose) { 835 int buf, txb, bbw, sbw, ram; 836 837 buf = txb = bbw = sbw = ram = -1; 838 switch ( sc->proto_dlcr6 & FE_D6_BUFSIZ ) { 839 case FE_D6_BUFSIZ_8KB: buf = 8; break; 840 case FE_D6_BUFSIZ_16KB: buf = 16; break; 841 case FE_D6_BUFSIZ_32KB: buf = 32; break; 842 case FE_D6_BUFSIZ_64KB: buf = 64; break; 843 } 844 switch ( sc->proto_dlcr6 & FE_D6_TXBSIZ ) { 845 case FE_D6_TXBSIZ_2x2KB: txb = 2; break; 846 case FE_D6_TXBSIZ_2x4KB: txb = 4; break; 847 case FE_D6_TXBSIZ_2x8KB: txb = 8; break; 848 } 849 switch ( sc->proto_dlcr6 & FE_D6_BBW ) { 850 case FE_D6_BBW_BYTE: bbw = 8; break; 851 case FE_D6_BBW_WORD: bbw = 16; break; 852 } 853 switch ( sc->proto_dlcr6 & FE_D6_SBW ) { 854 case FE_D6_SBW_BYTE: sbw = 8; break; 855 case FE_D6_SBW_WORD: sbw = 16; break; 856 } 857 switch ( sc->proto_dlcr6 & FE_D6_SRAM ) { 858 case FE_D6_SRAM_100ns: ram = 100; break; 859 case FE_D6_SRAM_150ns: ram = 150; break; 860 } 861 device_printf(dev, "SRAM %dKB %dbit %dns, TXB %dKBx2, %dbit I/O\n", 862 buf, bbw, ram, txb, sbw); 863 } 864 if (sc->stability & UNSTABLE_IRQ) 865 device_printf(dev, "warning: IRQ number may be incorrect\n"); 866 if (sc->stability & UNSTABLE_MAC) 867 device_printf(dev, "warning: above MAC address may be incorrect\n"); 868 if (sc->stability & UNSTABLE_TYPE) 869 device_printf(dev, "warning: hardware type was not validated\n"); 870 871 return 0; 872} 873 874int 875fe_alloc_port(device_t dev, int size) 876{ 877 struct fe_softc *sc = device_get_softc(dev); 878 struct resource *res; 879 int rid; 880 881 rid = 0; 882 res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 883 0ul, ~0ul, size, RF_ACTIVE); 884 if (res) { 885 sc->port_used = size; 886 sc->port_res = res; 887 return (0); 888 } 889 890 return (ENOENT); 891} 892 893int 894fe_alloc_irq(device_t dev, int flags) 895{ 896 struct fe_softc *sc = device_get_softc(dev); 897 struct resource *res; 898 int rid; 899 900 rid = 0; 901 res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE | flags); 902 if (res) { 903 sc->irq_res = res; 904 return (0); 905 } 906 907 return (ENOENT); 908} 909 910void 911fe_release_resource(device_t dev) 912{ 913 struct fe_softc *sc = device_get_softc(dev); 914 915 if (sc->port_res) { 916 bus_release_resource(dev, SYS_RES_IOPORT, 0, sc->port_res); 917 sc->port_res = NULL; 918 } 919 if (sc->irq_res) { 920 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq_res); 921 sc->irq_res = NULL; 922 } 923} 924 925/* 926 * Reset interface, after some (hardware) trouble is deteced. 927 */ 928static void 929fe_reset (struct fe_softc *sc) 930{ 931 /* Record how many packets are lost by this accident. */ 932 sc->ifp->if_oerrors += sc->txb_sched + sc->txb_count; 933 sc->mibdata.dot3StatsInternalMacTransmitErrors++; 934 935 /* Put the interface into known initial state. */ 936 fe_stop(sc); 937 if (sc->ifp->if_flags & IFF_UP) 938 fe_init_locked(sc); 939} 940 941/* 942 * Stop everything on the interface. 943 * 944 * All buffered packets, both transmitting and receiving, 945 * if any, will be lost by stopping the interface. 946 */ 947void 948fe_stop (struct fe_softc *sc) 949{ 950 951 FE_ASSERT_LOCKED(sc); 952 953 /* Disable interrupts. */ 954 fe_outb(sc, FE_DLCR2, 0x00); 955 fe_outb(sc, FE_DLCR3, 0x00); 956 957 /* Stop interface hardware. */ 958 DELAY(200); 959 fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE); 960 DELAY(200); 961 962 /* Clear all interrupt status. */ 963 fe_outb(sc, FE_DLCR0, 0xFF); 964 fe_outb(sc, FE_DLCR1, 0xFF); 965 966 /* Put the chip in stand-by mode. */ 967 DELAY(200); 968 fe_outb(sc, FE_DLCR7, sc->proto_dlcr7 | FE_D7_POWER_DOWN); 969 DELAY(200); 970 971 /* Reset transmitter variables and interface flags. */ 972 sc->ifp->if_drv_flags &= ~(IFF_DRV_OACTIVE | IFF_DRV_RUNNING); 973 sc->tx_timeout = 0; 974 callout_stop(&sc->timer); 975 sc->txb_free = sc->txb_size; 976 sc->txb_count = 0; 977 sc->txb_sched = 0; 978 979 /* MAR loading can be delayed. */ 980 sc->filter_change = 0; 981 982 /* Call a device-specific hook. */ 983 if (sc->stop) 984 sc->stop(sc); 985} 986 987/* 988 * Device timeout/watchdog routine. Entered if the device neglects to 989 * generate an interrupt after a transmit has been started on it. 990 */ 991static void 992fe_watchdog (void *arg) 993{ 994 struct fe_softc *sc = arg; 995 996 FE_ASSERT_LOCKED(sc); 997 998 if (sc->tx_timeout && --sc->tx_timeout == 0) { 999 /* A "debug" message. */ 1000 if_printf(sc->ifp, "transmission timeout (%d+%d)%s\n", 1001 sc->txb_sched, sc->txb_count, 1002 (sc->ifp->if_flags & IFF_UP) ? "" : " when down"); 1003 if (sc->ifp->if_opackets == 0 && sc->ifp->if_ipackets == 0) 1004 if_printf(sc->ifp, "wrong IRQ setting in config?\n"); 1005 fe_reset(sc); 1006 } 1007 callout_reset(&sc->timer, hz, fe_watchdog, sc); 1008} 1009 1010/* 1011 * Initialize device. 1012 */ 1013static void 1014fe_init (void * xsc) 1015{ 1016 struct fe_softc *sc = xsc; 1017 1018 FE_LOCK(sc); 1019 fe_init_locked(sc); 1020 FE_UNLOCK(sc); 1021} 1022 1023static void 1024fe_init_locked (struct fe_softc *sc) 1025{ 1026 1027 /* Start initializing 86960. */ 1028 1029 /* Call a hook before we start initializing the chip. */ 1030 if (sc->init) 1031 sc->init(sc); 1032 1033 /* 1034 * Make sure to disable the chip, also. 1035 * This may also help re-programming the chip after 1036 * hot insertion of PCMCIAs. 1037 */ 1038 DELAY(200); 1039 fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE); 1040 DELAY(200); 1041 1042 /* Power up the chip and select register bank for DLCRs. */ 1043 DELAY(200); 1044 fe_outb(sc, FE_DLCR7, 1045 sc->proto_dlcr7 | FE_D7_RBS_DLCR | FE_D7_POWER_UP); 1046 DELAY(200); 1047 1048 /* Feed the station address. */ 1049 fe_outblk(sc, FE_DLCR8, IF_LLADDR(sc->ifp), ETHER_ADDR_LEN); 1050 1051 /* Clear multicast address filter to receive nothing. */ 1052 fe_outb(sc, FE_DLCR7, 1053 sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP); 1054 fe_outblk(sc, FE_MAR8, fe_filter_nothing.data, FE_FILTER_LEN); 1055 1056 /* Select the BMPR bank for runtime register access. */ 1057 fe_outb(sc, FE_DLCR7, 1058 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP); 1059 1060 /* Initialize registers. */ 1061 fe_outb(sc, FE_DLCR0, 0xFF); /* Clear all bits. */ 1062 fe_outb(sc, FE_DLCR1, 0xFF); /* ditto. */ 1063 fe_outb(sc, FE_DLCR2, 0x00); 1064 fe_outb(sc, FE_DLCR3, 0x00); 1065 fe_outb(sc, FE_DLCR4, sc->proto_dlcr4); 1066 fe_outb(sc, FE_DLCR5, sc->proto_dlcr5); 1067 fe_outb(sc, FE_BMPR10, 0x00); 1068 fe_outb(sc, FE_BMPR11, FE_B11_CTRL_SKIP | FE_B11_MODE1); 1069 fe_outb(sc, FE_BMPR12, 0x00); 1070 fe_outb(sc, FE_BMPR13, sc->proto_bmpr13); 1071 fe_outb(sc, FE_BMPR14, 0x00); 1072 fe_outb(sc, FE_BMPR15, 0x00); 1073 1074 /* Enable interrupts. */ 1075 fe_outb(sc, FE_DLCR2, FE_TMASK); 1076 fe_outb(sc, FE_DLCR3, FE_RMASK); 1077 1078 /* Select requested media, just before enabling DLC. */ 1079 if (sc->msel) 1080 sc->msel(sc); 1081 1082 /* Enable transmitter and receiver. */ 1083 DELAY(200); 1084 fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_ENABLE); 1085 DELAY(200); 1086 1087#ifdef DIAGNOSTIC 1088 /* 1089 * Make sure to empty the receive buffer. 1090 * 1091 * This may be redundant, but *if* the receive buffer were full 1092 * at this point, then the driver would hang. I have experienced 1093 * some strange hang-up just after UP. I hope the following 1094 * code solve the problem. 1095 * 1096 * I have changed the order of hardware initialization. 1097 * I think the receive buffer cannot have any packets at this 1098 * point in this version. The following code *must* be 1099 * redundant now. FIXME. 1100 * 1101 * I've heard a rumore that on some PC Card implementation of 1102 * 8696x, the receive buffer can have some data at this point. 1103 * The following message helps discovering the fact. FIXME. 1104 */ 1105 if (!(fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP)) { 1106 if_printf(sc->ifp, 1107 "receive buffer has some data after reset\n"); 1108 fe_emptybuffer(sc); 1109 } 1110 1111 /* Do we need this here? Actually, no. I must be paranoia. */ 1112 fe_outb(sc, FE_DLCR0, 0xFF); /* Clear all bits. */ 1113 fe_outb(sc, FE_DLCR1, 0xFF); /* ditto. */ 1114#endif 1115 1116 /* Set 'running' flag, because we are now running. */ 1117 sc->ifp->if_drv_flags |= IFF_DRV_RUNNING; 1118 callout_reset(&sc->timer, hz, fe_watchdog, sc); 1119 1120 /* 1121 * At this point, the interface is running properly, 1122 * except that it receives *no* packets. we then call 1123 * fe_setmode() to tell the chip what packets to be 1124 * received, based on the if_flags and multicast group 1125 * list. It completes the initialization process. 1126 */ 1127 fe_setmode(sc); 1128 1129#if 0 1130 /* ...and attempt to start output queued packets. */ 1131 /* TURNED OFF, because the semi-auto media prober wants to UP 1132 the interface keeping it idle. The upper layer will soon 1133 start the interface anyway, and there are no significant 1134 delay. */ 1135 fe_start_locked(sc->ifp); 1136#endif 1137} 1138 1139/* 1140 * This routine actually starts the transmission on the interface 1141 */ 1142static void 1143fe_xmit (struct fe_softc *sc) 1144{ 1145 /* 1146 * Set a timer just in case we never hear from the board again. 1147 * We use longer timeout for multiple packet transmission. 1148 * I'm not sure this timer value is appropriate. FIXME. 1149 */ 1150 sc->tx_timeout = 1 + sc->txb_count; 1151 1152 /* Update txb variables. */ 1153 sc->txb_sched = sc->txb_count; 1154 sc->txb_count = 0; 1155 sc->txb_free = sc->txb_size; 1156 sc->tx_excolls = 0; 1157 1158 /* Start transmitter, passing packets in TX buffer. */ 1159 fe_outb(sc, FE_BMPR10, sc->txb_sched | FE_B10_START); 1160} 1161 1162/* 1163 * Start output on interface. 1164 * We make one assumption here: 1165 * 1) that the IFF_DRV_OACTIVE flag is checked before this code is called 1166 * (i.e. that the output part of the interface is idle) 1167 */ 1168static void 1169fe_start (struct ifnet *ifp) 1170{ 1171 struct fe_softc *sc = ifp->if_softc; 1172 1173 FE_LOCK(sc); 1174 fe_start_locked(ifp); 1175 FE_UNLOCK(sc); 1176} 1177 1178static void 1179fe_start_locked (struct ifnet *ifp) 1180{ 1181 struct fe_softc *sc = ifp->if_softc; 1182 struct mbuf *m; 1183 1184#ifdef DIAGNOSTIC 1185 /* Just a sanity check. */ 1186 if ((sc->txb_count == 0) != (sc->txb_free == sc->txb_size)) { 1187 /* 1188 * Txb_count and txb_free co-works to manage the 1189 * transmission buffer. Txb_count keeps track of the 1190 * used potion of the buffer, while txb_free does unused 1191 * potion. So, as long as the driver runs properly, 1192 * txb_count is zero if and only if txb_free is same 1193 * as txb_size (which represents whole buffer.) 1194 */ 1195 if_printf(ifp, "inconsistent txb variables (%d, %d)\n", 1196 sc->txb_count, sc->txb_free); 1197 /* 1198 * So, what should I do, then? 1199 * 1200 * We now know txb_count and txb_free contradicts. We 1201 * cannot, however, tell which is wrong. More 1202 * over, we cannot peek 86960 transmission buffer or 1203 * reset the transmission buffer. (In fact, we can 1204 * reset the entire interface. I don't want to do it.) 1205 * 1206 * If txb_count is incorrect, leaving it as-is will cause 1207 * sending of garbage after next interrupt. We have to 1208 * avoid it. Hence, we reset the txb_count here. If 1209 * txb_free was incorrect, resetting txb_count just loses 1210 * some packets. We can live with it. 1211 */ 1212 sc->txb_count = 0; 1213 } 1214#endif 1215 1216 /* 1217 * First, see if there are buffered packets and an idle 1218 * transmitter - should never happen at this point. 1219 */ 1220 if ((sc->txb_count > 0) && (sc->txb_sched == 0)) { 1221 if_printf(ifp, "transmitter idle with %d buffered packets\n", 1222 sc->txb_count); 1223 fe_xmit(sc); 1224 } 1225 1226 /* 1227 * Stop accepting more transmission packets temporarily, when 1228 * a filter change request is delayed. Updating the MARs on 1229 * 86960 flushes the transmission buffer, so it is delayed 1230 * until all buffered transmission packets have been sent 1231 * out. 1232 */ 1233 if (sc->filter_change) { 1234 /* 1235 * Filter change request is delayed only when the DLC is 1236 * working. DLC soon raise an interrupt after finishing 1237 * the work. 1238 */ 1239 goto indicate_active; 1240 } 1241 1242 for (;;) { 1243 1244 /* 1245 * See if there is room to put another packet in the buffer. 1246 * We *could* do better job by peeking the send queue to 1247 * know the length of the next packet. Current version just 1248 * tests against the worst case (i.e., longest packet). FIXME. 1249 * 1250 * When adding the packet-peek feature, don't forget adding a 1251 * test on txb_count against QUEUEING_MAX. 1252 * There is a little chance the packet count exceeds 1253 * the limit. Assume transmission buffer is 8KB (2x8KB 1254 * configuration) and an application sends a bunch of small 1255 * (i.e., minimum packet sized) packets rapidly. An 8KB 1256 * buffer can hold 130 blocks of 62 bytes long... 1257 */ 1258 if (sc->txb_free 1259 < ETHER_MAX_LEN - ETHER_CRC_LEN + FE_DATA_LEN_LEN) { 1260 /* No room. */ 1261 goto indicate_active; 1262 } 1263 1264#if FE_SINGLE_TRANSMISSION 1265 if (sc->txb_count > 0) { 1266 /* Just one packet per a transmission buffer. */ 1267 goto indicate_active; 1268 } 1269#endif 1270 1271 /* 1272 * Get the next mbuf chain for a packet to send. 1273 */ 1274 IF_DEQUEUE(&sc->ifp->if_snd, m); 1275 if (m == NULL) { 1276 /* No more packets to send. */ 1277 goto indicate_inactive; 1278 } 1279 1280 /* 1281 * Copy the mbuf chain into the transmission buffer. 1282 * txb_* variables are updated as necessary. 1283 */ 1284 fe_write_mbufs(sc, m); 1285 1286 /* Start transmitter if it's idle. */ 1287 if ((sc->txb_count > 0) && (sc->txb_sched == 0)) 1288 fe_xmit(sc); 1289 1290 /* 1291 * Tap off here if there is a bpf listener, 1292 * and the device is *not* in promiscuous mode. 1293 * (86960 receives self-generated packets if 1294 * and only if it is in "receive everything" 1295 * mode.) 1296 */ 1297 if (!(sc->ifp->if_flags & IFF_PROMISC)) 1298 BPF_MTAP(sc->ifp, m); 1299 1300 m_freem(m); 1301 } 1302 1303 indicate_inactive: 1304 /* 1305 * We are using the !OACTIVE flag to indicate to 1306 * the outside world that we can accept an 1307 * additional packet rather than that the 1308 * transmitter is _actually_ active. Indeed, the 1309 * transmitter may be active, but if we haven't 1310 * filled all the buffers with data then we still 1311 * want to accept more. 1312 */ 1313 sc->ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1314 return; 1315 1316 indicate_active: 1317 /* 1318 * The transmitter is active, and there are no room for 1319 * more outgoing packets in the transmission buffer. 1320 */ 1321 sc->ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1322 return; 1323} 1324 1325/* 1326 * Drop (skip) a packet from receive buffer in 86960 memory. 1327 */ 1328static void 1329fe_droppacket (struct fe_softc * sc, int len) 1330{ 1331 int i; 1332 1333 /* 1334 * 86960 manual says that we have to read 8 bytes from the buffer 1335 * before skip the packets and that there must be more than 8 bytes 1336 * remaining in the buffer when issue a skip command. 1337 * Remember, we have already read 4 bytes before come here. 1338 */ 1339 if (len > 12) { 1340 /* Read 4 more bytes, and skip the rest of the packet. */ 1341 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE) 1342 { 1343 (void) fe_inb(sc, FE_BMPR8); 1344 (void) fe_inb(sc, FE_BMPR8); 1345 (void) fe_inb(sc, FE_BMPR8); 1346 (void) fe_inb(sc, FE_BMPR8); 1347 } 1348 else 1349 { 1350 (void) fe_inw(sc, FE_BMPR8); 1351 (void) fe_inw(sc, FE_BMPR8); 1352 } 1353 fe_outb(sc, FE_BMPR14, FE_B14_SKIP); 1354 } else { 1355 /* We should not come here unless receiving RUNTs. */ 1356 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE) 1357 { 1358 for (i = 0; i < len; i++) 1359 (void) fe_inb(sc, FE_BMPR8); 1360 } 1361 else 1362 { 1363 for (i = 0; i < len; i += 2) 1364 (void) fe_inw(sc, FE_BMPR8); 1365 } 1366 } 1367} 1368 1369#ifdef DIAGNOSTIC 1370/* 1371 * Empty receiving buffer. 1372 */ 1373static void 1374fe_emptybuffer (struct fe_softc * sc) 1375{ 1376 int i; 1377 u_char saved_dlcr5; 1378 1379#ifdef FE_DEBUG 1380 if_printf(sc->ifp, "emptying receive buffer\n"); 1381#endif 1382 1383 /* 1384 * Stop receiving packets, temporarily. 1385 */ 1386 saved_dlcr5 = fe_inb(sc, FE_DLCR5); 1387 fe_outb(sc, FE_DLCR5, sc->proto_dlcr5); 1388 DELAY(1300); 1389 1390 /* 1391 * When we come here, the receive buffer management may 1392 * have been broken. So, we cannot use skip operation. 1393 * Just discard everything in the buffer. 1394 */ 1395 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE) 1396 { 1397 for (i = 0; i < 65536; i++) { 1398 if (fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP) 1399 break; 1400 (void) fe_inb(sc, FE_BMPR8); 1401 } 1402 } 1403 else 1404 { 1405 for (i = 0; i < 65536; i += 2) { 1406 if (fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP) 1407 break; 1408 (void) fe_inw(sc, FE_BMPR8); 1409 } 1410 } 1411 1412 /* 1413 * Double check. 1414 */ 1415 if (fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP) { 1416 if_printf(sc->ifp, 1417 "could not empty receive buffer\n"); 1418 /* Hmm. What should I do if this happens? FIXME. */ 1419 } 1420 1421 /* 1422 * Restart receiving packets. 1423 */ 1424 fe_outb(sc, FE_DLCR5, saved_dlcr5); 1425} 1426#endif 1427 1428/* 1429 * Transmission interrupt handler 1430 * The control flow of this function looks silly. FIXME. 1431 */ 1432static void 1433fe_tint (struct fe_softc * sc, u_char tstat) 1434{ 1435 int left; 1436 int col; 1437 1438 /* 1439 * Handle "excessive collision" interrupt. 1440 */ 1441 if (tstat & FE_D0_COLL16) { 1442 1443 /* 1444 * Find how many packets (including this collided one) 1445 * are left unsent in transmission buffer. 1446 */ 1447 left = fe_inb(sc, FE_BMPR10); 1448 if_printf(sc->ifp, "excessive collision (%d/%d)\n", 1449 left, sc->txb_sched); 1450 1451 /* 1452 * Clear the collision flag (in 86960) here 1453 * to avoid confusing statistics. 1454 */ 1455 fe_outb(sc, FE_DLCR0, FE_D0_COLLID); 1456 1457 /* 1458 * Restart transmitter, skipping the 1459 * collided packet. 1460 * 1461 * We *must* skip the packet to keep network running 1462 * properly. Excessive collision error is an 1463 * indication of the network overload. If we 1464 * tried sending the same packet after excessive 1465 * collision, the network would be filled with 1466 * out-of-time packets. Packets belonging 1467 * to reliable transport (such as TCP) are resent 1468 * by some upper layer. 1469 */ 1470 fe_outb(sc, FE_BMPR11, FE_B11_CTRL_SKIP | FE_B11_MODE1); 1471 1472 /* Update statistics. */ 1473 sc->tx_excolls++; 1474 } 1475 1476 /* 1477 * Handle "transmission complete" interrupt. 1478 */ 1479 if (tstat & FE_D0_TXDONE) { 1480 1481 /* 1482 * Add in total number of collisions on last 1483 * transmission. We also clear "collision occurred" flag 1484 * here. 1485 * 1486 * 86960 has a design flaw on collision count on multiple 1487 * packet transmission. When we send two or more packets 1488 * with one start command (that's what we do when the 1489 * transmission queue is crowded), 86960 informs us number 1490 * of collisions occurred on the last packet on the 1491 * transmission only. Number of collisions on previous 1492 * packets are lost. I have told that the fact is clearly 1493 * stated in the Fujitsu document. 1494 * 1495 * I considered not to mind it seriously. Collision 1496 * count is not so important, anyway. Any comments? FIXME. 1497 */ 1498 1499 if (fe_inb(sc, FE_DLCR0) & FE_D0_COLLID) { 1500 1501 /* Clear collision flag. */ 1502 fe_outb(sc, FE_DLCR0, FE_D0_COLLID); 1503 1504 /* Extract collision count from 86960. */ 1505 col = fe_inb(sc, FE_DLCR4); 1506 col = (col & FE_D4_COL) >> FE_D4_COL_SHIFT; 1507 if (col == 0) { 1508 /* 1509 * Status register indicates collisions, 1510 * while the collision count is zero. 1511 * This can happen after multiple packet 1512 * transmission, indicating that one or more 1513 * previous packet(s) had been collided. 1514 * 1515 * Since the accurate number of collisions 1516 * has been lost, we just guess it as 1; 1517 * Am I too optimistic? FIXME. 1518 */ 1519 col = 1; 1520 } 1521 sc->ifp->if_collisions += col; 1522 if (col == 1) 1523 sc->mibdata.dot3StatsSingleCollisionFrames++; 1524 else 1525 sc->mibdata.dot3StatsMultipleCollisionFrames++; 1526 sc->mibdata.dot3StatsCollFrequencies[col-1]++; 1527 } 1528 1529 /* 1530 * Update transmission statistics. 1531 * Be sure to reflect number of excessive collisions. 1532 */ 1533 col = sc->tx_excolls; 1534 sc->ifp->if_opackets += sc->txb_sched - col; 1535 sc->ifp->if_oerrors += col; 1536 sc->ifp->if_collisions += col * 16; 1537 sc->mibdata.dot3StatsExcessiveCollisions += col; 1538 sc->mibdata.dot3StatsCollFrequencies[15] += col; 1539 sc->txb_sched = 0; 1540 1541 /* 1542 * The transmitter is no more active. 1543 * Reset output active flag and watchdog timer. 1544 */ 1545 sc->ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1546 sc->tx_timeout = 0; 1547 1548 /* 1549 * If more data is ready to transmit in the buffer, start 1550 * transmitting them. Otherwise keep transmitter idle, 1551 * even if more data is queued. This gives receive 1552 * process a slight priority. 1553 */ 1554 if (sc->txb_count > 0) 1555 fe_xmit(sc); 1556 } 1557} 1558 1559/* 1560 * Ethernet interface receiver interrupt. 1561 */ 1562static void 1563fe_rint (struct fe_softc * sc, u_char rstat) 1564{ 1565 u_short len; 1566 u_char status; 1567 int i; 1568 1569 /* 1570 * Update statistics if this interrupt is caused by an error. 1571 * Note that, when the system was not sufficiently fast, the 1572 * receive interrupt might not be acknowledged immediately. If 1573 * one or more errornous frames were received before this routine 1574 * was scheduled, they are ignored, and the following error stats 1575 * give less than real values. 1576 */ 1577 if (rstat & (FE_D1_OVRFLO | FE_D1_CRCERR | FE_D1_ALGERR | FE_D1_SRTPKT)) { 1578 if (rstat & FE_D1_OVRFLO) 1579 sc->mibdata.dot3StatsInternalMacReceiveErrors++; 1580 if (rstat & FE_D1_CRCERR) 1581 sc->mibdata.dot3StatsFCSErrors++; 1582 if (rstat & FE_D1_ALGERR) 1583 sc->mibdata.dot3StatsAlignmentErrors++; 1584#if 0 1585 /* The reference MAC receiver defined in 802.3 1586 silently ignores short frames (RUNTs) without 1587 notifying upper layer. RFC 1650 (dot3 MIB) is 1588 based on the 802.3, and it has no stats entry for 1589 RUNTs... */ 1590 if (rstat & FE_D1_SRTPKT) 1591 sc->mibdata.dot3StatsFrameTooShorts++; /* :-) */ 1592#endif 1593 sc->ifp->if_ierrors++; 1594 } 1595 1596 /* 1597 * MB86960 has a flag indicating "receive queue empty." 1598 * We just loop, checking the flag, to pull out all received 1599 * packets. 1600 * 1601 * We limit the number of iterations to avoid infinite-loop. 1602 * The upper bound is set to unrealistic high value. 1603 */ 1604 for (i = 0; i < FE_MAX_RECV_COUNT * 2; i++) { 1605 1606 /* Stop the iteration if 86960 indicates no packets. */ 1607 if (fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP) 1608 return; 1609 1610 /* 1611 * Extract a receive status byte. 1612 * As our 86960 is in 16 bit bus access mode, we have to 1613 * use inw() to get the status byte. The significant 1614 * value is returned in lower 8 bits. 1615 */ 1616 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE) 1617 { 1618 status = fe_inb(sc, FE_BMPR8); 1619 (void) fe_inb(sc, FE_BMPR8); 1620 } 1621 else 1622 { 1623 status = (u_char) fe_inw(sc, FE_BMPR8); 1624 } 1625 1626 /* 1627 * Extract the packet length. 1628 * It is a sum of a header (14 bytes) and a payload. 1629 * CRC has been stripped off by the 86960. 1630 */ 1631 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE) 1632 { 1633 len = fe_inb(sc, FE_BMPR8); 1634 len |= (fe_inb(sc, FE_BMPR8) << 8); 1635 } 1636 else 1637 { 1638 len = fe_inw(sc, FE_BMPR8); 1639 } 1640 1641 /* 1642 * AS our 86960 is programed to ignore errored frame, 1643 * we must not see any error indication in the 1644 * receive buffer. So, any error condition is a 1645 * serious error, e.g., out-of-sync of the receive 1646 * buffer pointers. 1647 */ 1648 if ((status & 0xF0) != 0x20 || 1649 len > ETHER_MAX_LEN - ETHER_CRC_LEN || 1650 len < ETHER_MIN_LEN - ETHER_CRC_LEN) { 1651 if_printf(sc->ifp, 1652 "RX buffer out-of-sync\n"); 1653 sc->ifp->if_ierrors++; 1654 sc->mibdata.dot3StatsInternalMacReceiveErrors++; 1655 fe_reset(sc); 1656 return; 1657 } 1658 1659 /* 1660 * Go get a packet. 1661 */ 1662 if (fe_get_packet(sc, len) < 0) { 1663 /* 1664 * Negative return from fe_get_packet() 1665 * indicates no available mbuf. We stop 1666 * receiving packets, even if there are more 1667 * in the buffer. We hope we can get more 1668 * mbuf next time. 1669 */ 1670 sc->ifp->if_ierrors++; 1671 sc->mibdata.dot3StatsMissedFrames++; 1672 fe_droppacket(sc, len); 1673 return; 1674 } 1675 1676 /* Successfully received a packet. Update stat. */ 1677 sc->ifp->if_ipackets++; 1678 } 1679 1680 /* Maximum number of frames has been received. Something 1681 strange is happening here... */ 1682 if_printf(sc->ifp, "unusual receive flood\n"); 1683 sc->mibdata.dot3StatsInternalMacReceiveErrors++; 1684 fe_reset(sc); 1685} 1686 1687/* 1688 * Ethernet interface interrupt processor 1689 */ 1690static void 1691fe_intr (void *arg) 1692{ 1693 struct fe_softc *sc = arg; 1694 u_char tstat, rstat; 1695 int loop_count = FE_MAX_LOOP; 1696 1697 FE_LOCK(sc); 1698 1699 /* Loop until there are no more new interrupt conditions. */ 1700 while (loop_count-- > 0) { 1701 /* 1702 * Get interrupt conditions, masking unneeded flags. 1703 */ 1704 tstat = fe_inb(sc, FE_DLCR0) & FE_TMASK; 1705 rstat = fe_inb(sc, FE_DLCR1) & FE_RMASK; 1706 if (tstat == 0 && rstat == 0) { 1707 FE_UNLOCK(sc); 1708 return; 1709 } 1710 1711 /* 1712 * Reset the conditions we are acknowledging. 1713 */ 1714 fe_outb(sc, FE_DLCR0, tstat); 1715 fe_outb(sc, FE_DLCR1, rstat); 1716 1717 /* 1718 * Handle transmitter interrupts. 1719 */ 1720 if (tstat) 1721 fe_tint(sc, tstat); 1722 1723 /* 1724 * Handle receiver interrupts 1725 */ 1726 if (rstat) 1727 fe_rint(sc, rstat); 1728 1729 /* 1730 * Update the multicast address filter if it is 1731 * needed and possible. We do it now, because 1732 * we can make sure the transmission buffer is empty, 1733 * and there is a good chance that the receive queue 1734 * is empty. It will minimize the possibility of 1735 * packet loss. 1736 */ 1737 if (sc->filter_change && 1738 sc->txb_count == 0 && sc->txb_sched == 0) { 1739 fe_loadmar(sc); 1740 sc->ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1741 } 1742 1743 /* 1744 * If it looks like the transmitter can take more data, 1745 * attempt to start output on the interface. This is done 1746 * after handling the receiver interrupt to give the 1747 * receive operation priority. 1748 * 1749 * BTW, I'm not sure in what case the OACTIVE is on at 1750 * this point. Is the following test redundant? 1751 * 1752 * No. This routine polls for both transmitter and 1753 * receiver interrupts. 86960 can raise a receiver 1754 * interrupt when the transmission buffer is full. 1755 */ 1756 if ((sc->ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0) 1757 fe_start_locked(sc->ifp); 1758 } 1759 FE_UNLOCK(sc); 1760 1761 if_printf(sc->ifp, "too many loops\n"); 1762} 1763 1764/* 1765 * Process an ioctl request. This code needs some work - it looks 1766 * pretty ugly. 1767 */ 1768static int 1769fe_ioctl (struct ifnet * ifp, u_long command, caddr_t data) 1770{ 1771 struct fe_softc *sc = ifp->if_softc; 1772 struct ifreq *ifr = (struct ifreq *)data; 1773 int error = 0; 1774 1775 switch (command) { 1776 1777 case SIOCSIFFLAGS: 1778 /* 1779 * Switch interface state between "running" and 1780 * "stopped", reflecting the UP flag. 1781 */ 1782 FE_LOCK(sc); 1783 if (sc->ifp->if_flags & IFF_UP) { 1784 if ((sc->ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1785 fe_init_locked(sc); 1786 } else { 1787 if ((sc->ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) 1788 fe_stop(sc); 1789 } 1790 1791 /* 1792 * Promiscuous and/or multicast flags may have changed, 1793 * so reprogram the multicast filter and/or receive mode. 1794 */ 1795 fe_setmode(sc); 1796 FE_UNLOCK(sc); 1797 1798 /* Done. */ 1799 break; 1800 1801 case SIOCADDMULTI: 1802 case SIOCDELMULTI: 1803 /* 1804 * Multicast list has changed; set the hardware filter 1805 * accordingly. 1806 */ 1807 FE_LOCK(sc); 1808 fe_setmode(sc); 1809 FE_UNLOCK(sc); 1810 break; 1811 1812 case SIOCSIFMEDIA: 1813 case SIOCGIFMEDIA: 1814 /* Let if_media to handle these commands and to call 1815 us back. */ 1816 error = ifmedia_ioctl(ifp, ifr, &sc->media, command); 1817 break; 1818 1819 default: 1820 error = ether_ioctl(ifp, command, data); 1821 break; 1822 } 1823 1824 return (error); 1825} 1826 1827/* 1828 * Retrieve packet from receive buffer and send to the next level up via 1829 * ether_input(). 1830 * Returns 0 if success, -1 if error (i.e., mbuf allocation failure). 1831 */ 1832static int 1833fe_get_packet (struct fe_softc * sc, u_short len) 1834{ 1835 struct ifnet *ifp = sc->ifp; 1836 struct ether_header *eh; 1837 struct mbuf *m; 1838 1839 FE_ASSERT_LOCKED(sc); 1840 1841 /* 1842 * NFS wants the data be aligned to the word (4 byte) 1843 * boundary. Ethernet header has 14 bytes. There is a 1844 * 2-byte gap. 1845 */ 1846#define NFS_MAGIC_OFFSET 2 1847 1848 /* 1849 * This function assumes that an Ethernet packet fits in an 1850 * mbuf (with a cluster attached when necessary.) On FreeBSD 1851 * 2.0 for x86, which is the primary target of this driver, an 1852 * mbuf cluster has 4096 bytes, and we are happy. On ancient 1853 * BSDs, such as vanilla 4.3 for 386, a cluster size was 1024, 1854 * however. If the following #error message were printed upon 1855 * compile, you need to rewrite this function. 1856 */ 1857#if ( MCLBYTES < ETHER_MAX_LEN - ETHER_CRC_LEN + NFS_MAGIC_OFFSET ) 1858#error "Too small MCLBYTES to use fe driver." 1859#endif 1860 1861 /* 1862 * Our strategy has one more problem. There is a policy on 1863 * mbuf cluster allocation. It says that we must have at 1864 * least MINCLSIZE (208 bytes on FreeBSD 2.0 for x86) to 1865 * allocate a cluster. For a packet of a size between 1866 * (MHLEN - 2) to (MINCLSIZE - 2), our code violates the rule... 1867 * On the other hand, the current code is short, simple, 1868 * and fast, however. It does no harmful thing, just waists 1869 * some memory. Any comments? FIXME. 1870 */ 1871 1872 /* Allocate an mbuf with packet header info. */ 1873 MGETHDR(m, M_NOWAIT, MT_DATA); 1874 if (m == NULL) 1875 return -1; 1876 1877 /* Attach a cluster if this packet doesn't fit in a normal mbuf. */ 1878 if (len > MHLEN - NFS_MAGIC_OFFSET) { 1879 MCLGET(m, M_NOWAIT); 1880 if (!(m->m_flags & M_EXT)) { 1881 m_freem(m); 1882 return -1; 1883 } 1884 } 1885 1886 /* Initialize packet header info. */ 1887 m->m_pkthdr.rcvif = ifp; 1888 m->m_pkthdr.len = len; 1889 1890 /* Set the length of this packet. */ 1891 m->m_len = len; 1892 1893 /* The following silliness is to make NFS happy */ 1894 m->m_data += NFS_MAGIC_OFFSET; 1895 1896 /* Get (actually just point to) the header part. */ 1897 eh = mtod(m, struct ether_header *); 1898 1899 /* Get a packet. */ 1900 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE) 1901 { 1902 fe_insb(sc, FE_BMPR8, (u_int8_t *)eh, len); 1903 } 1904 else 1905 { 1906 fe_insw(sc, FE_BMPR8, (u_int16_t *)eh, (len + 1) >> 1); 1907 } 1908 1909 /* Feed the packet to upper layer. */ 1910 FE_UNLOCK(sc); 1911 (*ifp->if_input)(ifp, m); 1912 FE_LOCK(sc); 1913 return 0; 1914} 1915 1916/* 1917 * Write an mbuf chain to the transmission buffer memory using 16 bit PIO. 1918 * Returns number of bytes actually written, including length word. 1919 * 1920 * If an mbuf chain is too long for an Ethernet frame, it is not sent. 1921 * Packets shorter than Ethernet minimum are legal, and we pad them 1922 * before sending out. An exception is "partial" packets which are 1923 * shorter than mandatory Ethernet header. 1924 */ 1925static void 1926fe_write_mbufs (struct fe_softc *sc, struct mbuf *m) 1927{ 1928 u_short length, len; 1929 struct mbuf *mp; 1930 u_char *data; 1931 u_short savebyte; /* WARNING: Architecture dependent! */ 1932#define NO_PENDING_BYTE 0xFFFF 1933 1934 static u_char padding [ETHER_MIN_LEN - ETHER_CRC_LEN - ETHER_HDR_LEN]; 1935 1936#ifdef DIAGNOSTIC 1937 /* First, count up the total number of bytes to copy */ 1938 length = 0; 1939 for (mp = m; mp != NULL; mp = mp->m_next) 1940 length += mp->m_len; 1941 1942 /* Check if this matches the one in the packet header. */ 1943 if (length != m->m_pkthdr.len) { 1944 if_printf(sc->ifp, 1945 "packet length mismatch? (%d/%d)\n", 1946 length, m->m_pkthdr.len); 1947 } 1948#else 1949 /* Just use the length value in the packet header. */ 1950 length = m->m_pkthdr.len; 1951#endif 1952 1953#ifdef DIAGNOSTIC 1954 /* 1955 * Should never send big packets. If such a packet is passed, 1956 * it should be a bug of upper layer. We just ignore it. 1957 * ... Partial (too short) packets, neither. 1958 */ 1959 if (length < ETHER_HDR_LEN || 1960 length > ETHER_MAX_LEN - ETHER_CRC_LEN) { 1961 if_printf(sc->ifp, 1962 "got an out-of-spec packet (%u bytes) to send\n", length); 1963 sc->ifp->if_oerrors++; 1964 sc->mibdata.dot3StatsInternalMacTransmitErrors++; 1965 return; 1966 } 1967#endif 1968 1969 /* 1970 * Put the length word for this frame. 1971 * Does 86960 accept odd length? -- Yes. 1972 * Do we need to pad the length to minimum size by ourselves? 1973 * -- Generally yes. But for (or will be) the last 1974 * packet in the transmission buffer, we can skip the 1975 * padding process. It may gain performance slightly. FIXME. 1976 */ 1977 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE) 1978 { 1979 len = max(length, ETHER_MIN_LEN - ETHER_CRC_LEN); 1980 fe_outb(sc, FE_BMPR8, len & 0x00ff); 1981 fe_outb(sc, FE_BMPR8, (len & 0xff00) >> 8); 1982 } 1983 else 1984 { 1985 fe_outw(sc, FE_BMPR8, 1986 max(length, ETHER_MIN_LEN - ETHER_CRC_LEN)); 1987 } 1988 1989 /* 1990 * Update buffer status now. 1991 * Truncate the length up to an even number, since we use outw(). 1992 */ 1993 if ((sc->proto_dlcr6 & FE_D6_SBW) != FE_D6_SBW_BYTE) 1994 { 1995 length = (length + 1) & ~1; 1996 } 1997 sc->txb_free -= FE_DATA_LEN_LEN + 1998 max(length, ETHER_MIN_LEN - ETHER_CRC_LEN); 1999 sc->txb_count++; 2000 2001 /* 2002 * Transfer the data from mbuf chain to the transmission buffer. 2003 * MB86960 seems to require that data be transferred as words, and 2004 * only words. So that we require some extra code to patch 2005 * over odd-length mbufs. 2006 */ 2007 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE) 2008 { 2009 /* 8-bit cards are easy. */ 2010 for (mp = m; mp != 0; mp = mp->m_next) { 2011 if (mp->m_len) 2012 fe_outsb(sc, FE_BMPR8, mtod(mp, caddr_t), 2013 mp->m_len); 2014 } 2015 } 2016 else 2017 { 2018 /* 16-bit cards are a pain. */ 2019 savebyte = NO_PENDING_BYTE; 2020 for (mp = m; mp != 0; mp = mp->m_next) { 2021 2022 /* Ignore empty mbuf. */ 2023 len = mp->m_len; 2024 if (len == 0) 2025 continue; 2026 2027 /* Find the actual data to send. */ 2028 data = mtod(mp, caddr_t); 2029 2030 /* Finish the last byte. */ 2031 if (savebyte != NO_PENDING_BYTE) { 2032 fe_outw(sc, FE_BMPR8, savebyte | (*data << 8)); 2033 data++; 2034 len--; 2035 savebyte = NO_PENDING_BYTE; 2036 } 2037 2038 /* output contiguous words */ 2039 if (len > 1) { 2040 fe_outsw(sc, FE_BMPR8, (u_int16_t *)data, 2041 len >> 1); 2042 data += len & ~1; 2043 len &= 1; 2044 } 2045 2046 /* Save a remaining byte, if there is one. */ 2047 if (len > 0) 2048 savebyte = *data; 2049 } 2050 2051 /* Spit the last byte, if the length is odd. */ 2052 if (savebyte != NO_PENDING_BYTE) 2053 fe_outw(sc, FE_BMPR8, savebyte); 2054 } 2055 2056 /* Pad to the Ethernet minimum length, if the packet is too short. */ 2057 if (length < ETHER_MIN_LEN - ETHER_CRC_LEN) { 2058 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE) 2059 { 2060 fe_outsb(sc, FE_BMPR8, padding, 2061 ETHER_MIN_LEN - ETHER_CRC_LEN - length); 2062 } 2063 else 2064 { 2065 fe_outsw(sc, FE_BMPR8, (u_int16_t *)padding, 2066 (ETHER_MIN_LEN - ETHER_CRC_LEN - length) >> 1); 2067 } 2068 } 2069} 2070 2071/* 2072 * Compute the multicast address filter from the 2073 * list of multicast addresses we need to listen to. 2074 */ 2075static struct fe_filter 2076fe_mcaf ( struct fe_softc *sc ) 2077{ 2078 int index; 2079 struct fe_filter filter; 2080 struct ifmultiaddr *ifma; 2081 2082 filter = fe_filter_nothing; 2083 if_maddr_rlock(sc->ifp); 2084 TAILQ_FOREACH(ifma, &sc->ifp->if_multiaddrs, ifma_link) { 2085 if (ifma->ifma_addr->sa_family != AF_LINK) 2086 continue; 2087 index = ether_crc32_le(LLADDR((struct sockaddr_dl *) 2088 ifma->ifma_addr), ETHER_ADDR_LEN) >> 26; 2089#ifdef FE_DEBUG 2090 if_printf(sc->ifp, "hash(%6D) == %d\n", 2091 enm->enm_addrlo , ":", index); 2092#endif 2093 2094 filter.data[index >> 3] |= 1 << (index & 7); 2095 } 2096 if_maddr_runlock(sc->ifp); 2097 return ( filter ); 2098} 2099 2100/* 2101 * Calculate a new "multicast packet filter" and put the 86960 2102 * receiver in appropriate mode. 2103 */ 2104static void 2105fe_setmode (struct fe_softc *sc) 2106{ 2107 2108 /* 2109 * If the interface is not running, we postpone the update 2110 * process for receive modes and multicast address filter 2111 * until the interface is restarted. It reduces some 2112 * complicated job on maintaining chip states. (Earlier versions 2113 * of this driver had a bug on that point...) 2114 * 2115 * To complete the trick, fe_init() calls fe_setmode() after 2116 * restarting the interface. 2117 */ 2118 if (!(sc->ifp->if_drv_flags & IFF_DRV_RUNNING)) 2119 return; 2120 2121 /* 2122 * Promiscuous mode is handled separately. 2123 */ 2124 if (sc->ifp->if_flags & IFF_PROMISC) { 2125 /* 2126 * Program 86960 to receive all packets on the segment 2127 * including those directed to other stations. 2128 * Multicast filter stored in MARs are ignored 2129 * under this setting, so we don't need to update it. 2130 * 2131 * Promiscuous mode in FreeBSD 2 is used solely by 2132 * BPF, and BPF only listens to valid (no error) packets. 2133 * So, we ignore erroneous ones even in this mode. 2134 * (Older versions of fe driver mistook the point.) 2135 */ 2136 fe_outb(sc, FE_DLCR5, 2137 sc->proto_dlcr5 | FE_D5_AFM0 | FE_D5_AFM1); 2138 sc->filter_change = 0; 2139 return; 2140 } 2141 2142 /* 2143 * Turn the chip to the normal (non-promiscuous) mode. 2144 */ 2145 fe_outb(sc, FE_DLCR5, sc->proto_dlcr5 | FE_D5_AFM1); 2146 2147 /* 2148 * Find the new multicast filter value. 2149 */ 2150 if (sc->ifp->if_flags & IFF_ALLMULTI) 2151 sc->filter = fe_filter_all; 2152 else 2153 sc->filter = fe_mcaf(sc); 2154 sc->filter_change = 1; 2155 2156 /* 2157 * We have to update the multicast filter in the 86960, A.S.A.P. 2158 * 2159 * Note that the DLC (Data Link Control unit, i.e. transmitter 2160 * and receiver) must be stopped when feeding the filter, and 2161 * DLC trashes all packets in both transmission and receive 2162 * buffers when stopped. 2163 * 2164 * To reduce the packet loss, we delay the filter update 2165 * process until buffers are empty. 2166 */ 2167 if (sc->txb_sched == 0 && sc->txb_count == 0 && 2168 !(fe_inb(sc, FE_DLCR1) & FE_D1_PKTRDY)) { 2169 /* 2170 * Buffers are (apparently) empty. Load 2171 * the new filter value into MARs now. 2172 */ 2173 fe_loadmar(sc); 2174 } else { 2175 /* 2176 * Buffers are not empty. Mark that we have to update 2177 * the MARs. The new filter will be loaded by feintr() 2178 * later. 2179 */ 2180 } 2181} 2182 2183/* 2184 * Load a new multicast address filter into MARs. 2185 * 2186 * The caller must have acquired the softc lock before fe_loadmar. 2187 * This function starts the DLC upon return. So it can be called only 2188 * when the chip is working, i.e., from the driver's point of view, when 2189 * a device is RUNNING. (I mistook the point in previous versions.) 2190 */ 2191static void 2192fe_loadmar (struct fe_softc * sc) 2193{ 2194 /* Stop the DLC (transmitter and receiver). */ 2195 DELAY(200); 2196 fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE); 2197 DELAY(200); 2198 2199 /* Select register bank 1 for MARs. */ 2200 fe_outb(sc, FE_DLCR7, sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP); 2201 2202 /* Copy filter value into the registers. */ 2203 fe_outblk(sc, FE_MAR8, sc->filter.data, FE_FILTER_LEN); 2204 2205 /* Restore the bank selection for BMPRs (i.e., runtime registers). */ 2206 fe_outb(sc, FE_DLCR7, 2207 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP); 2208 2209 /* Restart the DLC. */ 2210 DELAY(200); 2211 fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_ENABLE); 2212 DELAY(200); 2213 2214 /* We have just updated the filter. */ 2215 sc->filter_change = 0; 2216} 2217 2218/* Change the media selection. */ 2219static int 2220fe_medchange (struct ifnet *ifp) 2221{ 2222 struct fe_softc *sc = (struct fe_softc *)ifp->if_softc; 2223 2224#ifdef DIAGNOSTIC 2225 /* If_media should not pass any request for a media which this 2226 interface doesn't support. */ 2227 int b; 2228 2229 for (b = 0; bit2media[b] != 0; b++) { 2230 if (bit2media[b] == sc->media.ifm_media) break; 2231 } 2232 if (((1 << b) & sc->mbitmap) == 0) { 2233 if_printf(sc->ifp, 2234 "got an unsupported media request (0x%x)\n", 2235 sc->media.ifm_media); 2236 return EINVAL; 2237 } 2238#endif 2239 2240 /* We don't actually change media when the interface is down. 2241 fe_init() will do the job, instead. Should we also wait 2242 until the transmission buffer being empty? Changing the 2243 media when we are sending a frame will cause two garbages 2244 on wires, one on old media and another on new. FIXME */ 2245 FE_LOCK(sc); 2246 if (sc->ifp->if_flags & IFF_UP) { 2247 if (sc->msel) sc->msel(sc); 2248 } 2249 FE_UNLOCK(sc); 2250 2251 return 0; 2252} 2253 2254/* I don't know how I can support media status callback... FIXME. */ 2255static void 2256fe_medstat (struct ifnet *ifp, struct ifmediareq *ifmr) 2257{ 2258 (void)ifp; 2259 (void)ifmr; 2260} 2261